System Control Register Description; Table 16: Overview Of System Control Registers - Siemens ERTEC200 Manual

Enhanced real-time ethernet controller
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UART_CLK

Table 16: Overview of System Control Registers

4.8.2

System Control Register Description

ID_REG
Description
Identification of ERTEC 200.
Bit No.
Name
31..16
ERTEC200-ID
15..8
HW-RELEASE
7..0
METALL-FIX
BOOT_REG
Description
Boot mode pins BOOT[3:0] can be read
Bit No.
Name
31..4
Reserved
3 .. 0
BOOT[3:0]
CONFIG_REG
Description
ERTEC 200 config pins CONFIG[6:1] can be read.
Bit No.
Name
31..7
Reserved
6 .. 1
CONFIG[6:1]
0
Reserved
RES_CTRL_REG
Description
Control register for reset of ERTEC 200
Bit No.
Name
31..13
Reserved
12:3
PULSE_DUR
2
EN_WD_SOFT_
RES_IRTE
1
XRES_SOFT
0
WD_RES_FREI
RES_ STAT _REG
Description
Status register for reset of ERTEC 200.
Only the bit of the last reset event occurrence is set. The two other bits are reset.
Bit No.
Name
31..3
Reserved
2
HW_RESET
1
SW_RESET
0
WD_RESET
Copyright © Siemens AG 2007. All rights reserved.
Technical data subject to change
0x0070
4 bytes
R
Addr.: 0x4000_2600
Description
ERTEC 200 identifier: 4027h
HW release: 01h
Metal fix: 00h
R
Addr.: 0x4000_2604
Description
Reserved
Reading of Boot[3] pin
R
Addr.: 0x4000_2608
Description
Reserved
Reading of CONFIG[6:1] pin
Reserved
Addr.: 0x4000_260C
W/R
Description
Reserved
Pulse duration of SW or watchdog reset.
T
= (8 x n + 8) x T
RES_PULSE
T
:
APB clock period (1/50 MHz = 20 ns)
CLK
n:
Value of PULSE_DUR (0 .. 1023)
The integrated PHYs require a reset duration of > 100µs. This requires the
setting n > 625.
0: The IRTE switch controller is not reset for the watchdog/soft reset.
1: The IRTE switch controller is reset for the watchdog/soft reset.
1: Software reset (not latching)
1: Enable watchdog reset
R
Addr.: 0x4000_2610
Description
Reserved
1: Last reset was PowerOn or Hardware reset
1: Last reset was Software reset
1: Last reset was Watchdog reset
R/W
0x00000000
Default: 0x4027_0100
Default: Bootpins[3:0]
Default:Configpins[6:1]
;
CLK
Default: 0x0000_0004
59
UART clock selection
50MHz/6MHz
Default: 0x0000_0004
ERTEC 200 Manual
Version 1.1.0

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