Motorola MVME5500 Installation And Use Manual page 55

VME Settings
PCI Slave Image 2 Control = C0410000
Sets LSI2_CTL to indicate that this image is enabled, write
posting is enabled, VMEbus data width is 16 bits, VMEbus
3
address space is A24, data and non-supervisory AM encoding, no
BLT transfers to the VMEbus, and to accept addresses in PCI
memory space.
PCI Slave Image 2 Base Address Register = B0000000
Sets LSI2_BS to indicate that the lower bound of PCI memory
addresses to be transferred to the VMEbus by this image is
0xB0000000.
PCI Slave Image 2 Bound Address Register = B1000000
Sets LSI2_BD to indicate that the upper bound of PCI memory
addresses to be transferred by this image is 0xB1000000.
PCI Slave Image 2 Translation Offset = 400000000
Sets LSI2_TO to indicate that the PCI memory address is to be
translated by 0x40000000 before presentation on the VMEbus; the
result of the translation is: 0xB0000000 + 0x40000000 =
0xF0000000, thus 0xF0000000 on the VMEbus.
PCI Slave Image 3 Control = C0400000
Sets LSI3_CTL to indicate that this image is enabled, write
posting is enabled, VMEbus data width is 16 bits, VMEbus
address space is A16, data and non-supervisory AM encoding, no
BLT transfers to the VMEbus, and to accept addresses in PCI
memory space.
PCI Slave Image 3 Base Address Register = B3FF0000
Sets LSI3_BS to indicate that the lower bound of PCI memory
addresses to be transferred to the VMEbus by this image is
0xB3FF0000.
PCI Slave Image 3 Bound Address Register = B4000000
Sets LSI3_BD to indicate that the upper bound of PCI memory
addresses to be transferred by this image is 0xB4000000.
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