Page 1 ® Intel Server Board S2600KP Product ® Family and Intel Compute Module HNS2600KP Product Family Technical Product Specification A document providing an overview of product features, functions, architecture, and support specifications 1.37 EVISION 2017 PRIL ® S NTEL ERVER RODUCTS AND...
Page 2: Revision History
October, 2016 1.36 Intel® ESRT2 SATA DOM support for RAID-0 and RAID-1 Typographical corrections Added S2600KPFR Mellanox IB card has no driver support for Windows OS April, 2017 1.37 Errata: Removed “ED2 – 4: CATERR due to CPU 3-strike timeout” from CATERR Sensor section Revision 1.37...
Page 3 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any...
Page 4: Table Of Contents
Air Duct ..............................20 2.13 Intel ® RAID C600 Upgrade Key ....................21 2.14 Intel ® Remote Management Module 4 (Intel ® RMM4) Lite ..........21 2.15 Breakout Board ..........................22 2.16 System Software Overview ......................23 2.16.1 System BIOS ............................24 2.16.2...
Page 5 IMC Modes of Operation ....................... 40 4.1.2 Memory RASM Features ........................ 41 Supported DDR4-2400 memory for Intel® Xeon processor v4 Product Family ..42 Supported DDR4-2133 memory for Intel® Xeon processor v4 Product Family ..43 Memory Slot Identification and Population Rules ............. 43 System Memory Sizing and Publishing ...................
Page 6 Technical Product Specification 6.1.2 Backup Power Connector ......................66 System Management Headers ....................67 6.2.1 Intel ® Remote Management Module 4 (Intel ® RMM4) Lite Connector ......67 6.2.2 IPMB Header ............................67 6.2.3 Control Panel Connector ......................67 Bridge Board Connector ........................ 68 6.3.1...
Page 7 Power Management Bus (PMBus*) ..................122 9.3.16 Power Supply Dynamic Redundancy Sensor ..............122 9.3.17 Component Fault LED Control ....................123 9.3.18 CMOS Battery Monitoring ......................124 Intel ® Intelligent Power Node Manager (NM)..............124 9.4.1 Hardware Requirements ......................124 9.4.2 Features ............................. 125 9.4.3...
Page 8 Table of Contents Technical Product Specification 9.5.2 Embedded Web Server ....................... 127 9.5.3 Advanced Management Feature Support (RMM4 Lite) ..........129 10 Thermal Management ......................... 134 11 System Security ..........................136 11.1 Password Setup ..........................136 11.1.1 System Administrator Password Rights ................137 11.1.2 Authorized System User Password Rights and Restrictions ........
Page 9 Technical Product Specification Table of Contents Appendix F: Statement of Volatility ....................185 Glossary ..............................187 Reference Documents ......................... 189 Revision 1.37...
Page 10 Figure 12. Intel ® Server Board S2600KPFR Block Diagram ................ 12 Figure 13. Intel® Server Board S2600KPTR Block Diagram ................. 13 Figure 14. Power Docking Board Overview ...................... 14 Figure 15. 6G SATA Bridge Board Overview ....................15 Figure 16. 12G SAS Bridge Board with IT mode Overview ................ 15 Figure 17.
Page 11 Technical Product Specification List of Figures Figure 36. Add-in Card Support Block Diagram (S2600KPR) ..............53 Figure 37. Server Board Riser Slots (S2600KPFR) ..................53 Figure 38. SATA Support ............................55 Figure 39. SATA RAID 5 Upgrade Key......................... 59 Figure 40. Network Interface Connectors ......................60 Figure 41.
Page 12 Table 4. POST Hot-Keys ............................26 Table 5. Mixed Processor Configurations Error Summary ................. 33 Table 6. DDR4-2400 DIMM Support Guidelines for Intel® Xeon processor v4 Product Family . 42 Table 8. DIMM Nomenclature ..........................44 Table 9. Supported DIMM Populations ......................44 Table 10.
Page 13 Table 61. Processor Sensors ..........................111 Table 62. Processor Status Sensor Implementation ................. 112 Table 63. Component Fault LEDs ........................123 Table 64. Intel Remote Management Module 4 (RMM4) Options ............126 ® Table 65. Basic and Advanced Server Management Features Overview .......... 127 Table 66.
Page 14 List of Tables Technical Product Specification Table 74. Capacitive Loading Conditions ....................... 144 Table 75. Ripples and Noise ..........................145 Table 76. Timing Requirements ......................... 146 Table 77. Timing Requirements (12VSB) ....................... 147 Table 78. BMC Sensor Table ..........................152 Table 79.
Page 15 Technical Product Specification List of Tables <This page is intentionally left blank.> Revision 1.37...
Page 17: Introduction
External Product Specifications (EPS) or External Design Specifications (EDS) related to this server generation. EPS and EDS documents are made available under NDA with Intel and must be ordered through your local Intel representative. See the Reference Documents section for a list of available documents.
Page 18: Server Board Use Disclaimer
Integration) and power delivery components that need adequate airflow to cool. Intel ensures through its own chassis development and testing that when Intel server building blocks are used together, the fully integrated system will meet the intended thermal requirements of these components.
Page 19: Product Features Overview
A board will be identified by its name which has described features or functions unique to it. S2600KPFR – With onboard InfiniBand* controller providing one external rear QSFP+ ...
Page 20: Table 1. Intel Server Board S2600Kp Product Family Feature Set
PCIe* 3.0 (2.5, 5, 8 GT/s) Power Connections Two sets of 2x3 pin connectors (main power 1/2) System Fan Support  One 2x7 pin fan control connector for Intel compute module and chassis  Three 1x8 pin fan connectors for third-party chassis Video ...
Page 21 Intelligent Power Node Manager (Need PMBus*-compliant power supply) Security Intel® Trusted Platform Module (TPM) v1.2 for BBS2600KPTR only  Warning! The riser slot 1 on the server board is designed for plugging in ONLY the riser card. Plugging in any PCIe* card may cause permanent server board and PCIe* card damage.
Page 22: Components And Features Identification
This section provides a general overview of the server board and compute module, identifying key features and component locations. The majority of the items identified are common in the product family. Figure 3. Server Board Components (S2600KPFR) Figure 4. Compute Module Components Revision 1.37...
Page 23: Rear Connectors And Back Panel Feature Identification
Description Description NIC port 1 (RJ45) Dedicated Management Port (RJ45) NIC port 2 (RJ45) InfiniBand* Port (QSFP+, S2600KPFR only) Video out (DB-15) POST Code LEDs (8 LEDs) ID LED InfiniBand* Activity LED (S2600KPFR only) Status LED InfiniBand* Link LED (S2600KPFR only) Dual port USB Figure 5.
Page 24: Intel Light Guided Diagnostic Led
Product Features Overview Technical Product Specification 2.3 Intel ® Light Guided Diagnostic LED Figure 7. Intel ® Light Guided Diagnostic LED 2.4 Jumper Identification Figure 8. Jumper Identification Revision 1.37...
Page 25: Mechanical Dimension And Weight
Technical Product Specification Product Features Overview 2.5 Mechanical Dimension and Weight Figure 9. Server Board Dimension Figure 10. Compute Module Dimension Revision 1.37...
Page 26: Product Architecture Overview
Intel ® C612 chipset, and other supporting components including the Integrated BMC, the Intel I350 network interface controller, and the Mellanox* Connect-IB* adapter (S2600KPFR ® only). The half-width board size allows four boards to reside in a standard multi-compute module 2U Intel ®...
Page 27: Figure 11. Intel Server Board S2600Kpr Block Diagram
Technical Product Specification Product Features Overview Figure 11. Intel ® Server Board S2600KPR Block Diagram Revision 1.37...
Page 28: Figure 12. Intel Server Board S2600Kpfr Block Diagram
Product Features Overview Technical Product Specification Figure 12. Intel ® Server Board S2600KPFR Block Diagram Revision 1.37...
Page 29: Power Docking Board
Technical Product Specification Product Features Overview Figure 13. Intel® Server Board S2600KPTR Block Diagram The Intel ® Compute Module HNS2600KP product family provides a series of features including the power docking board, bridge boards, riser cards, fans, and the air duct.
Page 30: Bridge Board
Product Features Overview Technical Product Specification 8-pin connector for fan 1 2x6-pin main power output connector 8-pin connector for fan 2 12-pin connector for main power input 8-pin connector for fan 3 Figure 14. Power Docking Board Overview 2.8 Bridge Board There are four types of bridge boards that implement different features and functions.
Page 31: Sas Bridge Board With It Mode
Technical Product Specification Product Features Overview Label Description 2x40-pin card edge connector (to the bridge board connector on the server board) Figure 15. 6G SATA Bridge Board Overview 2.8.2 12G SAS Bridge Board with IT mode The optional 12G SAS bridge board with IT mode has one embedded LSI* SAS 3008 controller to support up to four SAS/SATA, a 7-pin SATA connector for SATA DOM devices, and a UART (Universal Asynchronous Receiver/Transmitter) header.
Page 32: Sas Bridge Board With Raid 0, 1, 5 And 10
Product Features Overview Technical Product Specification 2x40-pin card edge connector (to the bridge board connector on the server board) 200-pin connector (to Riser Slot 3 on the server board) Figure 17. 12G SAS Bridge Board with RAID 0, 1 and 10 Overview 2.8.4 12G SAS Bridge Board with RAID 0, 1, 5 and 10 The optional 12G SAS bridge board with RAID 5 has one embedded LSI* SAS 3008 controller to support up to four SAS/SATA ports with RAID 0, 1, 10, and RAID 5 support, a 7-pin SATA...
Page 33: Riser Slot 2 Riser Card
2 riser card. The board provides electrical connectivity for installing an Intel® I/O Expansion Module and a SATA based M.2 form factor (NGFF, Next Generation Form Factor) storage device. It supports up to x8 lanes of PCIe* 3.0 for the I/O module, and a 7 pin SATA header for the M.2 device.
Page 34: Figure 22. Installing The M.2 Device
Product Features Overview Technical Product Specification The M.2 slot is on the backside of the AXXKPTPM2IOM, it can support M.2 2280 SSD which size is 80.0 mm X 22.0 mm X 3.8 mm. User can install the M.2 device to the M.2 slot (See the letter A on Figure 22) and fix it with the screw (See the letter B on the Figure 22).
Page 35: Figure 24. Connecting The M.2 Sata Cable
Technical Product Specification Product Features Overview Figure 24. Connecting the M.2 SATA cable Revision 1.37...
Page 36: Compute Module Fans
The cooling subsystem for the compute module consists of three 40 x 40 x 56 dual rotor fans. These components provide the necessary cooling and airflow. Figure 25. Compute Module Fans Note: The Intel Compute Module HNS2600KP product family does not support redundant ®...
Page 37: Intel Raid C600 Upgrade Key
® RAID C600 Upgrade Key The Intel ® RAID C600 Upgrade Key RKSATA4R5 is supported. With the optional key installed on the server board, Intel ESRT2 SATA RAID 5 is enabled. ® Figure 27. Intel ® RAID C600 Upgrade Key 2.14 Intel...
Page 38: Breakout Board
Figure 28. Intel ® RMM4 Lite 2.15 Breakout Board Intel provides a breakout board which is designed for the server board only I/O peripherals in a third-party chassis. It is not a standard accessory of the Intel ® Compute Module HNS2600KP product family or Intel ®...
Page 39: System Software Overview
Technical Product Specification Product Features Overview Label Description 7 pin miscellaneous signals connector Figure 29. Breakout Board Front and Rear View The breakout board has reserved holes for users to design their own bracket to fix the board into the server system. See the following mechanical drawing for details. Figure 30.
Page 40: System Bios
Shell using the uEFI-only System Update Package (SUP), or under different operating systems using the Intel ® One Boot Flash Update Utility (OFU). Reference the following Intel documents for more in-depth information about the system software stack and their functions: Intel Server System BIOS External Product Specification for Intel Server Systems ®...
Page 41 Technical Product Specification Product Features Overview Where: BoardFamilyID = String name to identify board family.  “SE5C610” is used to identify BIOS builds for Intel ® S2600 series Server Boards, based on the Intel ® Xeon ® Processor E5-2600 product families and the Intel ®...
Page 42: Table 4. Post Hot-Keys
If Quiet Boot is enabled in the <F2> BIOS setup, a “splash screen” is displayed with a  logo image, which may be the standard Intel Logo Screen or a customized OEM Logo Screen. By default, Quiet Boot is enabled in BIOS setup, so the Logo Screen is the default POST display.
Page 43 2.16.1.5 Entering BIOS Setup To enter the BIOS Setup Utility using a keyboard (or emulated keyboard), press the <F2> function key during boot time when the OEM or Intel Logo Screen or the POST Diagnostic Screen is displayed. The following instructional message is displayed on the Diagnostic Screen or under the Quiet Boot Logo Screen: Press <F2>...
Page 44: Field Replaceable Unit (Fru) And Sensor Data Record (Sdr) Data
SEL. From the uEFI Shell, the BIOS can then be updated using a standard BIOS update procedure, defined in Update Instructions provided with the system update package downloaded from the Intel web site. Once the update has completed, the recovery jumper is switched back to its default position and the system is power cycled.
Page 45: Baseboard Management Controller (Bmc) Firmware
OFU utility program under a given operating system. Full FRU and SDR update instructions are provided with the appropriate system update package (SUP) or OFU utility which can be downloaded from the Intel web site. 2.16.3 Baseboard Management Controller (BMC) Firmware See Platform Management chapter.
Page 46: Processor Support
E5-2600 v3/v4 product family, with a Thermal Design Power (TDP) of up to 160W. Note: Previous generation Intel ® Xeon ® processors are not supported on the Intel ® Server Boards described in this document. Visit http://www.intel.com/support for a complete list of supported processors.
Page 47: Processor Thermal Design Power (Tdp) Support
Disclaimer Note: Intel Corporation server boards contain a number of high-density VLSI and power delivery components that need adequate airflow to cool. Intel ensures through its own chassis development and testing that when Intel server building blocks are used together, the fully integrated system will meet the intended thermal requirements of these components.
Page 48: Processor Initialization Error Summary
Processor stepping within a common processor family can be mixed as long as it is listed in the processor specification updates published by Intel Corporation. 3.4 Processor Initialization Error Summary...
Page 49: Table 5. Mixed Processor Configurations Error Summary
Technical Product Specification Processor Support If the BIOS Setup option for “POST Error Pause” is Disabled, and a Major error is detected, the Post Error Code may be displayed to the screen, will be logged to the BIOS Setup Error Manager, an error event will be logged to the System Event Log (SEL), and the system will continue to boot.
Page 50  Logs the POST Error Code into the SEL.  Alerts the BMC to set the System Status LED to steady Amber.  Displays “0195: Processor Intel(R) QPI link frequencies unable to synchronize” message in the Error Manager.  Does not disable the processor.
Page 51: Processor Function Overview
The following sections will provide an overview of the key processor features and functions that help to define the architecture, performance, and supported functionality of the server board. For more comprehensive processor specific information, refer to the Intel Xeon ®...
Page 52 64 and IA-32 Intel ® Architecture (Intel ® VT-x) Hardware support in the core to improve the virtualization performance and robustness. Intel ® VT-x specifications and functional descriptions are included in the Intel ® 64 and IA-32 Architectures Software Developer’s Manual.
Page 53 FMA improves performance in face detection, professional imaging, and high performance computing. Gather operations increase vectorization opportunities for many applications. In addition to the vector extensions, this generation of Intel processors adds new bit manipulation instructions useful in compression, encryption, and general purpose software.
Page 54: Processor Heat Sink
ShinEtsu* G-751 or 7783D or Honeywell* PCM45F TIM is recommended. The mechanical performance of the heat sink must satisfy mechanical requirement of the processor. Figure 33. Processor Heat Sink Overview Note: The passive heat sink is Intel standard thermal solution for 1U/2U rack chassis. Revision 1.37...
Page 55: Memory Support
Technical Product Specification Memory Support Memory Support This chapter describes the architecture that drives the memory subsystem, supported memory types, memory population rules, and supported memory RAS features. Memory Subsystem Architecture Figure 34. Integrated Memory Controller Functional Block Diagram Note: This generation server board has support for DDR4 DIMMs only. DDR3 DIMMs are not supported on this generation server board.
Page 56: Imc Modes Of Operation
Rank level memory sparing Multi-rank level memory sparing Failed DIMM isolation Intel® Xeon® processor E5-2600 v4 product family only 4.1.1 IMC Modes of Operation A memory controller can be configured to operate in one of two modes, and each IMC operates separately.
Page 57: Memory Rasm Features
Technical Product Specification Memory Support support all DIMMs populated (that is, DIMMs with slower timings will force faster DIMMs to the slower common timing modes). 4.1.2 Memory RASM Features DRAM Single Device Data Correction (SDDC): SDDC provides error checking and ...
Page 58: Supported Ddr4-2400 Memory For Intel® Xeon Processor V4 Product Family
Memory Support Technical Product Specification 4.2 Supported DDR4-2400 memory for Intel® Xeon processor v4 Product Family Table 6. DDR4-2400 DIMM Support Guidelines for Intel® Xeon processor v4 Product Family Revision 1.37...
Page 59: Supported Ddr4-2133 Memory For Intel® Xeon Processor V4 Product Family
4.3 Supported DDR4-2133 memory for Intel® Xeon processor v4 Product Family Table 7. DDR4-2133 DIMM Support Guidelines for Intel® Xeon processor v4 Product Family 4.4 Memory Slot Identification and Population Rules Note: Although mixed DIMM configurations are supported, Intel only performs platform validation on systems that are configured with identical DIMMs installed.
Page 60: Figure 35. Dimm Slot Identification
Mixing of DDR4 operating frequencies is not validated within a socket or across sockets  by Intel. If DIMMs with different frequencies are mixed, all DIMMs run at the common lowest frequency. A maximum of eight logical ranks (ranks seen by the host) per channel is allowed.
Page 61: System Memory Sizing And Publishing
Technical Product Specification Memory Support Processor Socket 1 = Populated Processor Socket 2 = Populated Total DIMM# Mirror Mode Support 3 DIMMs 4 DIMMs 5 DIMMs 6 DIMMs 8 DIMMs 4.5 System Memory Sizing and Publishing The address space configured in a system depends on the amount of actual physical memory installed, on the RAS configuration, and on the PCI/PCIe configuration.
Page 62: Publishing System Memory
Memory Support Technical Product Specification For a 16GB QR DIMM, each rank would be 4GB. With one rank reserved on each channel, that would 32GB reserved. So the available effective memory size would be 256GB - 32GB, or 224GB. Mirroring Mode: Mirroring creates a duplicate image of the memory that is in use, ...
Page 63: Memory Initialization
Technical Product Specification Memory Support Manageability Engine (ME)  BIOS flash  4.6 Memory Initialization Memory Initialization at the beginning of POST includes multiple functions, including: DIMM discovery  Channel training  DIMM population validation check  Memory controller initialization and other hardware settings ...
Page 64 Memory Support Technical Product Specification unusable may result in causing this error when no usable DIMM remains in the memory configuration. 4.6.1.2 DIMM Population Validation Check Once the DIMM SPD parameters have been read they are checked to verify that the DIMMs on the given channel are installed in a valid configuration.
Page 65 Technical Product Specification Memory Support Potential Error Cases: Channel Training Error – If the Data/Data Strobe timing on the channel cannot be set  correctly so that the DIMMs can become operational, this results in a momentary Error Display 0xEA, and the channel is disabled. All DIMMs on the channel are marked as disabled, with POST Error Code 854x “DIMM Disabled”...
Page 66 Memory Support Technical Product Specification generated. In addition, a “RAS Configuration Disabled” SEL entry for “RAS Configuration Status” (BIOS Sensor 02/Type 0Ch/Generator ID 01) is logged. Revision 1.37...
Page 67: Server Board I/O
Technical Product Specification Server Board I/O Server Board I/O The server board input/output features are provided via the embedded features and functions of several onboard components including: the Integrated I/O Module (IIO) of the Intel ® Xeon ® processor E5-2600 v3/v4 product family, the Intel ®...
Page 68: Pcie Non-Transparent Bridge (Ntb)
 port on the first system is connected to the NTB port of the second system. It is not necessary for the first system to be an Intel® Xeon® Processor E5-2600 v3/v4 product family system. Note: When NTB is enabled in BIOS Setup, Spread Spectrum Clocking (SSC) will be automatically disabled.
Page 69: Add-In Card Support
The following sub-sections describe the server board features that are directly supported by the processor IIO module. These include the Riser Card Slots, Network Interface, and connectors for the optional I/O modules and SAS Module. Features and functions of the Intel ®...
Page 70: Table 10. Pcie* Port Routing - Cpu 1
Device (D) Function (F) On-board Device Port DMI 2/PCIe* x4 Chipset Port 1A - x4 InfiniBand* on S2600KPFR Riser Slot 2 on S2600KPR Port 1B - x4 InfiniBand* on S2600KPFR Riser Slot 2 on S2600KPR Port 2A - x4 Riser Slot 1...
Page 71: Serial Ata (Sata) Support
Technical Product Specification Server Board I/O 2. Riser slot 3 can be used only in dual processor configurations. Any graphic add-in card in riser slot 3 cannot output video, meaning that the default video out is still from on-board integrated BMC. 5.3 Serial ATA (SATA) Support The server board utilizes two chipset embedded AHCI SATA controllers, identified as SATA and sSATA (“s”...
Page 72: Table 13. Sata And Ssata Controller Feature Support
Server Board I/O Technical Product Specification SATA Controller sSATA Controller Supported Enhanced Enhanced Enhanced Disabled Enhanced RSTe Enhanced ESRT2 Disabled AHCI Disabled Enhanced Disabled Disabled Disabled RSTe Disabled ESRT2 RSTe AHCI RSTe Enhanced RSTe Disabled RSTe RSTe RSTe ESRT2 ESRT2 AHCI Microsoft* Windows Only ESRT2...
Page 73: Staggered Disk Spin-Up
Spin-Up – in the Setup Mass Storage Controller Configuration screen found in the <F2> BIOS Setup Utility. Embedded SATA RAID Support The server board has embedded support for two SATA RAID options: Intel Rapid Storage Technology (RSTe) 4.0 ® ...
Page 74 5 is well suited for applications that require high amounts of storage while maintaining fault tolerance. Note: RAID configurations cannot span across the two embedded AHCI SATA controllers. By using Intel ® RSTe, there is no loss of PCI resources (request/grant pair) or add-in card slot.
Page 75: Intel Embedded Server Raid Technology 2 (Esrt2)
Technical Product Specification Server Board I/O 5.4.2 Intel ® Embedded Server RAID Technology 2 (ESRT2) Features of ESRT2 include the following: Based on LSI* MegaRAID Software Stack  Software RAID with system providing memory and CPU utilization  RAID Level 0 – Non-redundant striping of drive volumes with performance scaling up ...
Page 76: Network Interface
Layer (PHY) ports. The Intel ® i350 NIC provides the server board with support for dual LAN ports designed for 10/100/1000 Mbps operation. Refer to the Intel ® i350 Gigabit Ethernet Controller Datasheet for full details of the NIC feature set.
Page 77: Mac Address Definition
The Intel ® Server Board S2600KP product family has the following four MAC addresses assigned to it at the Intel factory: NIC 1 Port 1 MAC address (for OS usage)  NIC 1 Port 2 MAC address = NIC 1 Port 1 MAC address + 1 (for OS usage) ...
Page 78: Universal Serial Bus (Usb) Ports
 add-in video adapter would be active. 5.7 Universal Serial Bus (USB) Ports There are eight USB 2.0 ports and six USB 3.0 ports available from Intel ® C612 chipset. All ports are high-speed, full-speed and low-speed capable. A total of five USB 2.0 dedicated ports are used.
Page 79: Serial Port
Serial Port A is an internal 10-pin DH-10 connector labeled “Serial_A”. 5.9 InfiniBand* Adapter Intel ® Server Board S2600KPFR is populated with a new generation InfiniBand* adapter device. Mellanox* Connect-IB* providing single port 10/20/40/56 Gb/s InfiniBand* interfaces. The functional diagram is as follows. Major features and functions include: Single InfiniBand* Port: SDR/DDR/QDR/FDR10/FDR with port remapping in firmware.
Page 80: Device Interfaces
Server Board I/O Technical Product Specification 5.9.1 Device Interfaces Following is a list of major interfaces of Mellanox* Connect-IB* chip: Clock and Reset signals: Include core clock input and chip reset signals.  Uplink Bus: The PCI Express* bus is a high-speed uplink interface used to connect ...
Page 81: Quad Small Form-Factor Pluggable (Qsfp+) Connector
 PCIe Function Level Reset (FLR)  5.9.2 Quad Small Form-factor Pluggable (QSFP+) Connector Port of the Mellanox* ConnectX-IB* is connected to a single QSFP+ connector on Intel ® Server Board S2600KPR (available on SKU: S2600KPFR). The QSFP+ module and all pins shall withstand 500V electrostatic discharge based on the Human Body Model per JEDEC JESD22-A114-B.
Page 82: Connector And Header
Connector and Header Technical Product Specification Connector and Header 6.1 Power Connectors 6.1.1 Main Power Connector To facilitate customers who want to cable to this board from a power supply, the power connector is implemented through two 6pin Minifit Jr* connectors, which can be used to deliver 12amps per pin or 60+Amps total.
Page 83: System Management Headers
RMM4 Lite connector is included on the server board to support the optional Intel ® Remote Management Module 4. There is no support for third-party management cards on this server board. Note: This connector is not compatible with the Intel ® Remote Management Module 3 (Intel ® RMM3).
Page 84: Bridge Board Connector
Connector and Header Technical Product Specification 6.3 Bridge Board Connector The bridge board delivers SATA/SAS signals, disk backplane management signals, BMC SMBus*es as well as control panel and miscellaneous compute module specific signals. Table 21. Bridge Board Connector Signal Signal SATA_SAS_SEL SATA6G_P0_RX_DP SATA6G_P0_TX_DN...
Page 85: Power Button
Technical Product Specification Connector and Header Signal Signal USB2_FP_DP Spare FM_PS_ALL_NODE_OFF SATA6G_P4_RX_DP FM_NODE_PRESENT_N (GND) SATA6G_P4_RX_DN SATA6G_P4_TX_DP FM_USB_OC_FP_N SATA6G_P4_TX_DN P5V Aux P5V Aux Combined system BIOS and the Integrated BMC support provide the functionality of the various supported control panel buttons and LEDs. The following sections describe the supported functionality of each control panel feature.
Page 86: I/O Connectors
Each riser slot has dedicated usage and cannot be used for normal PCIe based add-in card. Riser slot 1: Provide PCIe x16 to Riser. (Using standard 164-pin connector)  Riser slot 2: Provide PCIe x24 to Riser, or x8 to Intel ® I/O Expansion Module. (Using 200- ...
Page 87: Table 26. Pci Express* X16 Riser Slot 1 Connector
Technical Product Specification Connector and Header CPU1 IOU1 Riser 2 (Depoped IB x8 to IOM on Riser) CPU2 DMI2 IOU2 Reserved for DMI2 CPU2 IOU2 Riser 3 CPU2 IOU0 Unused CPU2 IOU1 Riser 3 +IOU2 The pin-outs for the slots are shown in the following tables. Table 26.
Page 88 Connector and Header Technical Product Specification Pin Name Pin Name PETxN3 PERxP3 PERxN3 PETxP4 PETxN4 PERxP4 PERxN4 PETxP5 PETxN5 PERxP5 PERxN5 PETxP6 PETxN6 PERxP6 PERxN6 PETxP7 PETxN7 PERxP7 PERxN7 PETxP8 PETxN8 PERxP8 PERxN8 PETxP9 PETxN9 PERxP9 PERxN9 PETxP10 PETxN10 PERxP10 PERxN10 PETxP11 PETxN11...
Page 89: Table 27. Pci Express* X24 Riser Slot 2 Connector
Technical Product Specification Connector and Header Pin Name Pin Name PERxN13 PETxP14 PETxN14 PERxP14 REFCLK+ PERxN14 REFCLK- PERxP15 PETxP15 PERxN15 PETxN15 Riser_ID0 Table 27. PCI Express* x24 Riser Slot 2 Connector Pin Name Description Pin Name Description FM_RISER_ID1 (See Table 28) PETxP0 Tx Lane 0+ PERxP0...
Page 90 Connector and Header Technical Product Specification Pin Name Description Pin Name Description PERxN7 (IB) Rx Lane 7- (IB) PETxP6 (IB) Tx Lane 6+ (IB) PERxP6 (IB) Rx Lane 6+ (IB) PETxN6 (IB) Tx Lane 6- (IB) PERxN6 (IB) Rx Lane 6- (IB) PETxP5 (IB) Tx Lane 5+ (IB) PERxP5 (IB)
Page 91 Technical Product Specification Connector and Header Pin Name Description Pin Name Description PERxN13 Rx Lane 13- PETxP14 Tx Lane 14+ PERxP14 Rx Lane 14+ PETxN14 Tx Lane 14- PERxN14 Rx Lane 14- PETxP15 Tx Lane 15+ PERxP15 Rx Lane 15+ PETxN15 Tx Lane 15- PERxN15...
Page 92: Table 28. Pci Express* X24 Riser Slot 3 Connector
Connector and Header Technical Product Specification Table 28. PCI Express* x24 Riser Slot 3 Connector Pin Name Description Pin Name Description RISER_ID2 (See Table 28) PETxP7 Tx Lane 7+ PERxP7 Rx Lane 7+ PETxN7 Tx Lane 7- PERxN7 Rx Lane 7- PETxP6 Tx Lane 6+ PERxP6...
Page 93 Technical Product Specification Connector and Header Pin Name Description Pin Name Description PERxN10 Rx Lane 10- PETxP9 Tx Lane 9+ PERxP9 Rx Lane 9+ PETxN9 Tx Lane 9- PERxN9 Rx Lane 9- PETxP8 Tx Lane 8+ PERxP8 Rx Lane 8+ PETxN8 Tx Lane 8- PERxN8...
Page 94: Vga Connector
Connector and Header Technical Product Specification Pin Name Description Pin Name Description RSVD P3V3/V4_AUX SAS_PRESENT_N SAS_PRESENT_N SMB_CLK SMB_PCI_SLOT3_CLK RSVD SMB_DATA SMB_PCI_SLOT3_DATA RSVD RSVD RSVD P12V P12V P12V P12V P12V Table 29. PCI Express* Riser ID Assignment CPU1 CPU2 Description Riser ID (0) Riser ID (1) Riser ID (2) Riser 1 1x16...
Page 95: Nic Connectors
Technical Product Specification Connector and Header Signal Name Description Ground Ground No fuse protection Ground No connection V_IO_DDCDAT DDCDAT V_IO_HSYNC_CONN HSYNC (horizontal sync) V_IO_VSYNC_CONN VSYNC (vertical sync) V_IO_DDCCLK DDCCLK 6.4.3 NIC Connectors The server board provides three independent RJ-45 connectors on the back edge of the board.
Page 96: Sata Sgpio Connectors
Description LED_HD_ACTIVE_N 6.4.7 Intel ® RAID C600 Upgrade Key Connector The server board provides one Intel ® RAID C600 Upgrade Key Connector (storage upgrade key) connector on board. The Intel RAID C600 Upgrade Key is a small PCB board that has up to two security EEPROMs ®...
Page 97: Serial Port Connectors
Technical Product Specification Connector and Header Table 36. Storage Upgrade Key Connector Signal Description PU_KEY PCH_SATA_RAID_KEY 6.4.8 Serial Port Connectors The server board provides one internal 9-pin serial type-A header. The following tables define the pin-outs. Table 37. Internal 9-pin Serial A Signal Name Signal Name SPA_DCD...
Page 98: Qsfp+ For Infiniband
Connector and Header Technical Product Specification Signal Name Signal Name 6.4.10 QSFP+ for InfiniBand* The following table details the pin-out of the QSFP+ connector found on the back edge of the server board. This port is available only on board SKU S2600KPF. Table 40.
Page 99: Fan Headers
ADM1275 controller uses a high true enable signal. When the compute module is turned off, the fans will continue to rotate at a preset rate; this rate is selected by Intel and preset by the Fan manufacturer. This is done to stop air recirculation between compute modules. When docking the board to a live 12V rail, the fans could spin up immediately;...
Page 100: Power Docking Board Connectors
Connector and Header Technical Product Specification 6.6 Power Docking Board Connectors The table below lists the connector type and pin definition on the power docking board. Table 44. Main Power Input Connector Signal Description Signal Description Lower Blade (Circuit 1) Upper Blade (Circuit 2) P12V P12V...
Page 101: Breakout Board Connector
Technical Product Specification Connector and Header Signal Description Signal Description P12V_HS P12V_HS P12V_HS P12V_HS P12V_HS 6.7 Breakout Board Connector Table 48. Miscellaneous Signal Connector Signal Description SMB_CHAS_SENSOR_STBY_LVC3_DATA SMB_CHAS_SENSOR_STBY_LVC3_CLK P3V3_AUX FP_LED_STATUS_AMBER_R_N FP_LED_STATUS_GREEN_R_N FP_NMI_BTN_R_N Revision 1.37...
Page 102: Configuration Jumpers
Configuration Jumpers Technical Product Specification Configuration Jumpers The following table provides a summary and description of configuration, test, and debug jumpers. The server board has several 3-pin jumper blocks that can be used. Pin 1 on each jumper block can be identified by the following symbol on the silkscreen: ▼ Figure 44.
Page 103: Ps All Node Off (J6B4)
Configuration Jumpers 7.1 PS All Node off (J6B4) The PS All Node off jumper (J6B4) on the Intel® Server Board S2600KP product Family enables integration of a third party Chassis and/or Power Supply for board-only SKUs. The jumper has to stay in 2-3 in order to use this feature.
Page 104: Me Force Update (J5D2)
Configuration Jumpers Technical Product Specification 10. Move the jumper from the enabled position (covering pins 2 and 3) to the disabled position (covering pins 1 and 2). 11. Restore the air duct to the compute module. 12. Plug in the compute module back to the chassis and power up the server. Note: Normal BMC functionality is disabled with the Force BMC Update jumper set to the enabled position.
Page 105: Password Clear (J6B8)
Technical Product Specification Configuration Jumpers Remove the air duct. Move the jumper from the enabled position (covering pins 2 and 3) to the disabled position (covering pins 1 and 2). 10. Restore the compute module back to the chassis. 7.4 Password Clear (J6B8) The user sets this 3-pin jumper to clear the password.
Page 106: Bios Recovery Mode (J6B9)
Configuration Jumpers Technical Product Specification Table 53. Password Clear Jumper (J6B8) Jumper Position Mode of Operation Note Normal Normal mode, password in protection Clear Password BIOS password is cleared This jumper causes both the User password and the Administrator password to be cleared if they were set.
Page 107: Table 54. Bios Recovery Mode Jumper (J6B9)
Technical Product Specification Configuration Jumpers The BootBlock detects partial BIOS update and automatically boots in Recovery Mode.  The BMC asserts Recovery Mode GPIO in case of partial BIOS update and FRB2 time-  out. Table 54. BIOS Recovery Mode Jumper (J6B9) Jumper Position Mode of Operation Note...
Page 108: Bios Default (J6B7)
Configuration Jumpers Technical Product Specification 6. The BIOS will load and boot with the backup BIOS image without any video or display. 7. When the compute module boots into the EFI shell directly, the BIOS recovery is successful. 8. Power off the compute module. 9.
Page 109 Technical Product Specification Configuration Jumpers Revision 1.37...
Page 110: Intel Light-Guided Diagnostics
Intel® Light-Guided Diagnostics Technical Product Specification Intel ® Light-Guided Diagnostics Intel ® Server Board S2600KPR has several onboard diagnostic LEDs to assist in troubleshooting board-level issues. This section provides a description of the location and function of each LED on the server board.
Page 111: Table 56. Status Led State Definitions
Technical Product Specification Intel® Light-Guided Diagnostics Table 56. Status LED State Definitions Color State Criticality Description System is Not ready  System is powered off (AC and/or DC).  System is in EuP Lot6 Off Mode. operating  System is in S5 Soft-Off State.
Page 112 Intel® Light-Guided Diagnostics Technical Product Specification Color State Criticality Description Amber ~1 Hz blink Non-critical - System is Non-fatal alarm – system is likely to fail: operating in a degraded state  Critical threshold crossed – Voltage, temperature with an impending failure...
Page 113: Id Led
LED states during the BMC Boot/Reset process. Table 58. BMC Boot/Reset Status LED Indicators BMC Boot/Reset State Chassis Status Comment ID LED Non-recoverable condition. Contact your Intel BMC/Video memory test Solid Solid representative for information on replacing this failed Blue Amber motherboard.
Page 114: Infiniband* Link/Activity Led
8.4 InfiniBand* Link/Activity LED The server board provides dedicated LEDs for InfiniBand* Link/Activity. They are located on the baseboard rear, near diagnostic LED set. This set of LEDs works only on the Intel ® Server Board S2600KPF.
Page 115: Figure 47. Rear Panel Diagnostic Leds
Technical Product Specification Intel® Light-Guided Diagnostics Figure 47. Rear Panel Diagnostic LEDs Revision 1.37...
Page 116: Platform Management
This chapter provides a high level overview of the platform management features and functionality implemented on the server board. The Intel ® Server System BMC Firmware External Product Specification (EPS) and the Intel ® Server System BIOS External Product Specification (EPS) for Intel ®...
Page 117: Non Ipmi Features Overview
The chassis ID LED is turned on using a front panel button or a command. Power state retention  Power fault analysis  Intel ® Light-Guided Diagnostics  Power unit management: Support for power unit sensor. The BMC handles power- ...
Page 118 DCMI 1.5 compliance (product-specific).  Management support for PMBus* rev1.2 compliant power supplies  BMC Data Repository (Managed Data Region Feature)  Support for an Intel® Local Control Display Panel  System Airflow Monitoring  Exit Air Temperature Monitoring ...
Page 119: Platform Management Features And Functions
Technical Product Specification Platform Management Power Supply Cold Redundancy  Power Supply Firmware Update  Power Supply Compatibility Check  BMC firmware reliability enhancements:  o Redundant BMC boot blocks to avoid possibility of a corrupted boot block resulting in a scenario that prevents a user from updating the BMC. o BMC System Management Health Monitoring.
Page 120: System Initialization
Platform Management Technical Product Specification State Supported Description Soft off.  The front panel buttons are not locked.  The fans are stopped.  The power-up process goes through the normal boot process.  The power, reset, and ID buttons are unlocked. 9.2.3 System Initialization During system initialization, both the BIOS and the BMC initialize the following items.
Page 121: System Event Log (Sel)
Technical Product Specification Platform Management 9.2.3.3 Post Code Display The BMC, upon receiving standby power, initializes internal hardware to monitor port 80h (POST code) writes. Data written to port 80h is output to the system POST LEDs. The BMC deactivates POST LEDs after POST had completed. 9.2.4 System Event Log (SEL) The BMC implements the system event log as specified in the Intelligent Platform...
Page 122: Bios Event-Only Sensors
Platform Management Technical Product Specification A manual re-arm sensor does not clear the assertion state even when the threshold or offset becomes de-asserted. In this case, the event state and the input state (value) of the sensor do not track each other. The event assertion state is "sticky". The following methods can be used to re-arm a sensor: Automatic re-arm –...
Page 123: Margin Sensors
9.3.9 System Airflow Monitoring This sensor is only valid in Intel chassis. The BMC provides an IPMI sensor to report the volumetric system airflow in CFM (cubic feet per minute). The air flow in CFM is calculated based on the system fan PWM values. The specific Pulse Width Modulation (PWM or PWMs) used to determine the CFM is SDR configurable.
Page 124: Thermal Monitoring
Thermal fault indication sensors – These are discrete sensors that indicate a specific  thermal fault condition. 9.3.10.2 Processor DTS-Spec Margin Sensor(s) Intel ® Server Systems supporting the Intel ® Xeon ® processor E5-2600 v3/v4 product family incorporate a DTS based thermal spec. This allows a much more accurate control of the thermal solution and will enable lower fan speeds and lower fan power consumption.
Page 125 Technical Product Specification Platform Management 9.3.10.3 Processor Thermal Margin Sensor(s) Each processor supports a physical thermal margin sensor per core that is readable through the PECI interface. This provides a relative value representing a thermal margin from the core’s throttling thermal trip point. Assuming that temp controlled throttling is enabled; the physical core temp sensor reads ‘0’, which indicates the processor core is being throttled.
Page 126 Technical Product Specification 9.3.10.6 Inlet Temperature Sensor Each platform supports a thermal sensor for monitoring the inlet temperature. The inlet temperature sensor is on the backplane of Intel Server Chassis with address 21h. For ® third-party chassis, sensor 20h which is on the front edge of the baseboard can be used as inlet temperature sensor with several degrees of preheat from front end.
Page 127: Processor Sensors
Technical Product Specification Platform Management modules themselves may or may not provide a physical thermal sensor (a TMP75 device). If the BMC detects that a module is installed, it will attempt to access the physical thermal sensor and, if found, enable the associated IPMI temperature sensor. 9.3.10.13 Processor ThermTrip When a Processor ThermTrip occurs, the system hardware will automatically power down the server.
Page 128: Table 62. Processor Status Sensor Implementation
Platform Management Technical Product Specification 1. A Rearm Sensor Events command is executed for the processor status sensor. 2. An AC or DC power cycle, system reset, or system boot occurs. The BMC provides system status indication to the front panel LEDs for processor fault conditions shown in Table 60.
Page 129 Technical Product Specification Platform Management where the BIOS and OS will attempt to gracefully handle error, but may not be always do so reliably. A continuously asserted ERR2 signal is an indication that the BIOS cannot service the condition that caused the error. This is usually because that condition prevents the BIOS from running.
Page 130: Voltage Monitoring
Platform Management Technical Product Specification 2: CPU Core Error (not supported on Intel ® Server Systems supporting the Intel ® Xeon ® processor E5-2600 v3/v4 product family) 3: MSID Mismatch ED3 - CPU bitmap that causes the system CATERR. [0]: CPU1...
Page 131 Technical Product Specification Platform Management Most fan implementations provide for a variable speed fan, so the variations in fan speed can be large. Therefore the threshold values must be set sufficiently low as not to result in inappropriate threshold crossings. Fan tach sensors are implemented as manual re-arm sensors because a lower-critical threshold crossing can result in full boosting of the fans.
Page 132: Standard Fan Management
After the sensor is rearmed, if the fan is no longer showing a failed state, the failure condition in the IPMI sensor shall be cleared and a de-assertion event shall be logged. 9.3.13.5 Monitoring for “Fans Off” Scenario On Intel ® Server Systems supporting the Intel ® Xeon ® processor E5-2600 v3/v4 product family, it is likely that there will be situations where specific fans are turned off based on current system conditions.
Page 133 Technical Product Specification Platform Management The sleep and boost states have fixed (but configurable through OEM SDRs) fan  speeds associated with them. The nominal state has a variable speed determined by the fan domain policy. An OEM  SDR record is used to configure the fan domain policy. The fan domain state is controlled by several factors.
Page 134 Platform Management Technical Product Specification The BMC controls the average duty cycle of each PWM signal through direct manipulation of the integrated PWM control registers. The same device may drive multiple PWM signals. 9.3.14.3 Nominal Fan Speed A fan domain’s nominal fan speed can be configured as static (fixed value) or controlled by the state of one or more associated temperature sensors.
Page 135: Figure 48. High-Level Fan Speed Control Process
DIMM thermal margin sensors  Exit air temperature sensor  Global aggregate thermal margin sensors  SSB (Intel ® C610 Series Chipset) temperature sensor  On-board Ethernet controller temperature sensors (support for this is specific to the  Ethernet controller being used) Add-in Intel ®...
Page 136 Platform Management Technical Product Specification 9.3.14.5.2 Memory Thermal Management The system memory is the most complex subsystem to thermally manage as it requires substantial interactions between the BMC, BIOS, and the embedded memory controller. This section provides an overview of this management capability from a BMC perspective. 9.3.14.5.2.1 Memory Thermal Throttling The system supports thermal management through closed loop throttling (CLTT) with...
Page 137 There is no manual selection of profiles at different altitudes. Altitude impact is covered by auto-profile. 9.3.14.6 Power Supply Fan Speed Control This section describes the system level control of the fans internal to the power supply over the PMBus*. Some, but not all Intel ® Server Systems supporting the Intel ®...
Page 138: Power Management Bus (Pmbus*)
This enables easier usage of the fan speed control to support Intel as well as third party chassis and better support of ambient temperatures higher than 35C.
Page 139: Component Fault Led Control
Technical Product Specification Platform Management health of the power subsystem’s component power supplies. The BMC implements Dynamic Power Supply Redundancy status based upon current system load requirements as well as total Power Supply capacity. This status is independent of the Cold Redundancy status. This prevents the BMC from reporting Fully Redundant Power supplies when the load required by the system exceeds half the power capability of all power supplies installed and operational.
Page 140: Cmos Battery Monitoring
BMC firmware to poll the battery voltage at a relatively slow rate in order to conserve battery power. Intel ® Intelligent Power Node Manager (NM) Power management deals with requirements to manage processor power consumption and manage power at the platform level to meet critical business needs.
Page 141: Features
The Management Engine has access to the “Host SMBus*”.  9.4.4 PECI 3.0 The BMC owns the PECI bus for all Intel server implementations and acts as a proxy  for the ME when necessary. 9.4.5 NM “Discovery” OEM SDR An NM “discovery”...
Page 142: Basic And Advanced Server Management Features
9.4.6.1.1 Dependencies on PMBus*-compliant Power Supply Support The SmaRT/CLST system feature depends on functionality present in the ME NM SKU. This feature requires power supplies that are compliant with the PMBus. Note: For additional information on Intel ® Intelligent Power Node Manager usage and support, please visit the following Intel Website: http://www.intel.com/content/www/us/en/data-center/data-center-management/node-...
Page 143: Dedicated Management Port
Technical Product Specification Platform Management When the BMC firmware initializes, it attempts to access the Intel ® RMM4 lite. If the attempt to access Intel ® RMM4 lite is successful, then the BMC activates the advanced features. The following table identifies both basic and advanced server management features.
Page 144 The GUI session automatically times-out after a user-configurable inactivity period. By  default, this inactivity period is 30 minutes. Embedded Platform Debug feature - Allow the user to initiate a “debug dump” to a file  that can be sent to Intel for debug purposes. Revision 1.37...
Page 145: Advanced Management Feature Support (Rmm4 Lite)
BMC Web Console Users Guide. 9.5.3 Advanced Management Feature Support (RMM4 Lite) The integrated baseboard management controller has support for advanced management features which are enabled when an optional Intel Remote Management Module 4 Lite (RMM4 ® Lite) is installed. The Intel ®...
Page 146 The BMC firmware supports keyboard, video, and mouse redirection (KVM) over LAN. This feature is available remotely from the embedded web server as a Java applet. This feature is only enabled when the Intel ® RMM4 lite is present. The client system must have a Java Runtime Environment (JRE) version 6.0 or later to run the KVM or media redirection applets.
Page 147 Technical Product Specification Platform Management 1280x960 at 60Hz  1280x1024 at 60Hz  1600x1200 at 60Hz  1920x1080 (1080p)  1920x1200 (WUXGA)  1650x1080 (WSXGA+)  9.5.3.2 Remote Console The Remote Console is the redirected screen, keyboard and mouse of the remote host system. To use the Remote Console window of your managed host system, the browser must include a Java* Runtime Environment plug-in.
Page 148 Platform Management Technical Product Specification 9.5.3.5 Availability The remote KVM session is available even when the server is powered-off (in stand-by mode). No re-start of the remote KVM session shall be required during a server reset or power on/off. A BMC reset (for example, due to a BMC Watchdog initiated reset or BMC reset after BMC firmware update) will require the session to be re-established.
Page 149 5124 – CD Redirection (Secure)  5127 – FD Redirection (Secure)  7578 – Video Redirection  7582 – Video Redirection (Secure)  For additional information, reference the Intel Remote Management Module 4 and Integrated ® BMC Web Console Users Guide. Revision 1.37...
Page 150: Thermal Management
The compute module supports short-term, excursion-based, operation up to 45°C (ASHRAE A4) with limited performance impact. The configuration requirements and limitations are described in the configuration matrix found in the Power Budget and Thermal Configuration Tool, available as a download online at http://www.intel.com/support. Revision 1.37...
Page 151 Specific configuration requirements and limitations are documented in the  configuration matrix found in the Power Budget and Thermal Configuration Tool, available as a download online at http://www.intel.com/support. The CPU-1 processor + CPU heat sink must be installed first. The CPU-2 heat sink ...
Page 152: System Security
System Security Technical Product Specification 11 System Security The server board supports a variety of system security options designed to prevent unauthorized system access or tampering of server settings. System security options supported include: Password Protection  Front Panel Lockout ...
Page 153: System Administrator Password Rights
Technical Product Specification System Security The Administrator and User passwords must be different from each other. An error message will be displayed and a different password must be entered if there is an attempt to enter the same password for both. The use of “Strong Passwords” is encouraged, but not required. In order to meet the criteria for a strong password, the password entered must be at least 8 characters in length, and must include at least one each of alphabetic, numeric, and special characters.
Page 154: Front Panel Lockout
System Security Technical Product Specification In addition to restricting access to most Setup fields to viewing only when a User password is entered, defining a User password imposes restrictions on booting the system. In order to simply boot in the defined boot order, no password is required. However, the F6 Boot popup menu prompts for a password, and can only be used with the Administrator password.
Page 155: Tpm Security Bios
Technical Product Specification System Security 11.3.1 TPM security BIOS The BIOS TPM support conforms to the TPM PC Client Implementation Specification for Conventional BIOS, the TPM Interface Specification, and the Microsoft Windows BitLocker* Requirements. The role of the BIOS for TPM security includes the following: Measures and stores the boot process in the TPM microcontroller to allow a TPM enabled operating system to verify system boot integrity.
Page 156: Table 67. Tpm Setup Utility - Security Configuration Screen Fields
System Security Technical Product Specification Using BIOS TPM Setup, the operator can turn ON or OFF TPM functionality and clear the TPM ownership contents. After the requested TPM BIOS Setup operation is carried out, the option reverts to No Operation. The BIOS TPM Setup also displays the current state of the TPM, whether TPM is enabled or disabled and activated or deactivated.
Page 157: Environmental Limits Specification
Exposure to absolute maximum rating conditions for extended periods may affect long term system reliability. Note: The Energy Star compliance is at system level, but not board level. Use of Intel boards alone does not guarantee Energy Star compliance.
Page 158: Power Supply Specification Guidelines
Intel’s own DC power out requirements for a 1200W, 1600W and 2130W power supply as used in an Intel designed 2U server platform. The intent of this section is to provide customers with a guide to assist in defining and/or selecting a power supply for custom server platform designs that utilize the server boards detailed in this document.
Page 159: Standby Output
Technical Product Specification Power Supply Specification Guidelines 12Vstby must be able to provide 4.0A peak load with single power supply. The power supply fan is allowed to run in standby mode for loads > 1.5A. Length of time peak power can be supported is based on thermal sensor and assertion of the SMBAlert# signal.
Page 160: Grounding
Power Supply Specification Guidelines Technical Product Specification Table 74. Capacitive Loading Conditions Output Units +5VSB 3100 F +12VSB 3100 F +12V 25000 F 13.2.6 Grounding The output ground of the pins of the power supply provides the output power return path. The output connector ground pins shall be connected to the safety ground (power supply enclosure).
Page 161: Zero Load Stability Requirements
Technical Product Specification Power Supply Specification Guidelines 13.2.11 Zero Load Stability Requirements When the power subsystem operates in a no load condition, it does not need to meet the output regulation specification, but it must operate without any tripping of over-voltage or other fault circuitry.
Page 162: Table 76. Timing Requirements
Power Supply Specification Guidelines Technical Product Specification Table 76. Timing Requirements Item Description Units Output voltage rise time 5.0 * 70 * vout_rise Delay from AC being applied to 5VSB being within regulation. 1500 sb_on_delay Delay from AC being applied to all output voltages being 3000 ac_on_delay within regulation.
Page 163: Table 77. Timing Requirements (12Vsb)
Technical Product Specification Power Supply Specification Guidelines Table 77. Timing Requirements (12VSB) Item Description Units Tvout_rise Output voltage rise time 5.0 * 70 * Tsb_on_delay Delay from AC being applied to 12VSB being within 1500 regulation. Tac_on_delay Delay from AC being applied to all output voltages being 3000 within regulation.
Page 164: Figure 50. Turn On/Off Timing (Power Supply Signals - 5Vsb)
Power Supply Specification Guidelines Technical Product Specification AC Input vout_holdup Vout pwok_low AC_on_delay pwok_off sb_on_delay sb_on_delay pwok_on pwok_off pwok_on PWOK pson_pwok pwok_holdup 12Vsb sb_vout 5Vsb holdup pson_on_delay PSON AC turn on/off cycle PSON turn on/off cycle Figure 50. Turn On/Off Timing (Power Supply Signals – 5VSB) Figure 51.
Page 165: Appendix A: Integration And Usage Tips
When adding or removing components or peripherals from the server board, AC power  must be removed. With AC power plugged into the server board, 5V standby is still present even though the server board is powered off. This server board supports the Intel ® Xeon ®...
Page 166: Appendix B: Integrated Bmc Sensor Tables
Appendix B: Integrated BMC Sensor Tables Technical Product Specification Appendix B: Integrated BMC Sensor Tables This appendix lists the sensor identification numbers and information about the sensor type, name, supported thresholds, assertion and de-assertion information, and a brief description of the sensor purpose. See the Intelligent Platform Management Interface Specification, Version 2.0, for sensor and event/reading-type table information.
Page 167 Technical Product Specification Appendix B: Integrated BMC Sensor Tables The rearm is a request for the event status for a sensor to be rechecked and updated upon a transition between good and bad states. Rearming the sensors can be done manually or automatically.
Page 168: Table 78. Bmc Sensor Table
Appendix B: Integrated BMC Sensor Tables Technical Product Specification Note: All sensors listed below may not be present on all platforms. Please reference the BMC EPS for platform applicability. Redundancy sensors will only be present on systems with appropriate hardware to support redundancy (for instance, fan or power supply).
Page 169 Technical Product Specification Appendix B: Integrated BMC Sensor Tables Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets 00 - Timer expired, status only...
Page 170 Appendix B: Integrated BMC Sensor Tables Technical Product Specification Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Digital Voltage Regulator Watchdog...
Page 171 Technical Product Specification Appendix B: Integrated BMC Sensor Tables Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Sensor BMC Firmware Health...
Page 172 Appendix B: Integrated BMC Sensor Tables Technical Product Specification Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets nc = Front Panel Temperature...
Page 173 Technical Product Specification Appendix B: Integrated BMC Sensor Tables Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Hot-swap Backplane 3 nc =...
Page 174 Appendix B: Integrated BMC Sensor Tables Technical Product Specification Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets (PS2 Status) 01 - Failure...
Page 175 Technical Product Specification Appendix B: Integrated BMC Sensor Tables Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets 01 - Thermal trip/ Sensor...
Page 176 Appendix B: Integrated BMC Sensor Tables Technical Product Specification Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Digital Processor ERR2 Timeout...
Page 177 Technical Product Specification Appendix B: Integrated BMC Sensor Tables Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Digital VRD Over Temperature...
Page 178 Appendix B: Integrated BMC Sensor Tables Technical Product Specification Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Power Threshold...
Page 179 Technical Product Specification Appendix B: Integrated BMC Sensor Tables Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Generic –...
Page 180 Appendix B: Integrated BMC Sensor Tables Technical Product Specification Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets Global Aggregate Temperature...
Page 181 Technical Product Specification Appendix B: Integrated BMC Sensor Tables Full Sensor Name Senso Platform Sensor Type Event/Rea Event Offset Triggers Contrib. To Assert Readable Event Rearm Stand- (Sensor name in SDR) Applicabilit ding Type System Status /De- Value/ Data assert Offsets nc = Temperature...
Page 182 Appendix B: Integrated BMC Sensor Tables Technical Product Specification This is only applicable when the system doesn't support redundant power supplies. When redundancy is supported, then the contribution to system state is driven by the power unit redundancy sensor. On a system with power supply redundancy, the individual sensor severities will read the same as the power unit redundancy sensor’s severity.
Page 183: Appendix C: Bios Sensors And Sel Data
Technical Product Specification Appendix C: BIOS Sensors and SEL Data Appendix C: BIOS Sensors and SEL Data BIOS owns a set of IPMI-compliant Sensors. These are actually divided in ownership between BIOS POST (GID = 01) and BIOS SMI Handler (GID = 33). The SMI Handler Sensors are typically for logging runtime error events, but they are active during POST and may log errors such as Correctable Memory ECC Errors if they occur.
Page 184 Appendix C: BIOS Sensors and SEL Data Technical Product Specification Sensor Name Sensor Sensor Sensor Event/Reading Type Event Data 2 Number Owner (GID) Type Offset Values Event Data 3 Memory RAS 01h (BIOS 09h (Digital Discrete) ED2 = Configuration POST) (Memory) [7:4] = Reserved 0h = RAS Configuration...
Page 185 Technical Product Specification Appendix C: BIOS Sensors and SEL Data Sensor Name Sensor Sensor Sensor Event/Reading Type Event Data 2 Number Owner (GID) Type Offset Values Event Data 3 PCIe Fatal 33h (SMI 70h (OEM Discrete) ED2 = Error Handler) (Critical [7:0] = Bus Number 0h = Data Link Layer...
Page 186 Appendix C: BIOS Sensors and SEL Data Technical Product Specification Sensor Name Sensor Sensor Sensor Event/Reading Type Event Data 2 Number Owner (GID) Type Offset Values Event Data 3 QPI Fatal 33h (SMI 73h (OEM Discrete) ED2 = Error Handler) (Critical [7:0] = Node ID 0h = Link Layer...
Page 187 Technical Product Specification Appendix C: BIOS Sensors and SEL Data Sensor Name Sensor Sensor Sensor Event/Reading Type Event Data 2 Number Owner (GID) Type Offset Values Event Data 3 Sparing 33h (SMI 0Bh (Discrete, Redundancy ED2 = Redundancy Handler) (Memory) State) [7:4] = Sparing Domain State...
Page 188 Appendix C: BIOS Sensors and SEL Data Technical Product Specification Sensor Name Sensor Sensor Sensor Event/Reading Type Event Data 2 Number Owner (GID) Type Offset Values Event Data 3 Memory 33h (SMI 6Fh (Sensor Specific Offset) ED2 = Validity Parity Error Handler) (Memory) [7:5] = Reserved...
Page 189 Technical Product Specification Appendix C: BIOS Sensors and SEL Data Sensor Name Sensor Sensor Sensor Event/Reading Type Event Data 2 Number Owner (GID) Type Offset Values Event Data 3 QPI Fatal 33h (SMI 74h (OEM Discrete) ED2 = Error Handler) (Critical [7:0] = Node ID 0h = Illegal inbound request...
Page 190: Appendix D: Post Code Diagnostic Led Decoder
Appendix D: POST Code Diagnostic LED Decoder Technical Product Specification Appendix D: POST Code Diagnostic LED Decoder During the system POST process, Diagnostic LED Codes are used extensively as a mechanism to indicate progress and Fatal Halt conditions independently of the video display. If the system hangs or halts, the Diagnostic LED display can help determine the reason even when video is not available.
Page 191: Table 80. Post Code Led Example
02h = Memory DIMMs on all channels of all sockets are disabled due to hardware memtest error. 03h = No memory installed. All channels are disabled. 0xE9 Memory is locked by Intel® Trusted Execution Technology and is inaccessible. Revision 1.37...
Page 192: Table 82. Mrc Progress Codes
Appendix D: POST Code Diagnostic LED Decoder Technical Product Specification Error Code Fatal Error Code Explanation (with MRC Internal Minor Code) 0xEA DDR4 Channel Training Error: 01h = Error on read DQ/DQS (Data/Data Strobe) init 02h = Error on Receive Enable 03h = Error on Write Leveling 04h = Error on write DQ/DQS (Data/Data Strobe) 0xEB...
Page 193: Table 83. Post Progress Codes
Technical Product Specification Appendix D: POST Code Diagnostic LED Decoder Progress Code Main Sequence Subsequences/Subfunctions 0xB9 Hardware memory test and init —n/a— 0xBA Execute software memory init —n/a— 0xBB Program memory map and interleaving —n/a— 0xBC Program RAS configuration —n/a— 0xBF MRC is done —n/a—...
Page 194 Appendix D: POST Code Diagnostic LED Decoder Technical Product Specification Progress Code Description Protocol layer and other uncore 0xAA settings 0xAB Transition links to full speed operation 0xAC Phy layer setting 0xAD Link layer settings 0xAE Coherency settings 0xAF QPI initialization done 0x07 Early SB initialization during Sec Phase.
Page 195 Technical Product Specification Appendix D: POST Code Diagnostic LED Decoder Progress Code Description 0x68 DXE PCI Host Bridge Init 0x69 DXE NB Init 0x6A DXE NB SMM Init 0x70 DXE SB Init 0x71 DXE SB SMM Init 0x72 DXE SB devices Init 0x78 DXE ACPI Init 0x79...
Page 196 Appendix D: POST Code Diagnostic LED Decoder Technical Product Specification Progress Code Description 0x9B DXE SETUP start 0x9C DXE SETUP input wait 0x9D DXE Ready to Boot 0x9E DXE Legacy Boot 0x9F DXE Exit Boot Services 0xC0 RT Set Virtual Address Map Begin 0xC2 DXE Legacy Option ROM init 0xC3...
Page 197: Appendix E: Post Code Errors
Processor core/thread count mismatch detected Fatal 0192 Processor cache size mismatch detected Fatal 0194 Processor family mismatch detected Fatal 0195 Processor Intel(R) QPI link frequencies unable to synchronize Fatal 0196 Processor model mismatch detected Fatal 0197 Processor frequencies unable to synchronize Fatal 5220...
Page 198 Appendix E: POST Code Errors Technical Product Specification Error Code Error Message Response 8130 Processor 01 disabled Major 8131 Processor 02 disabled Major 8160 Processor 01 unable to apply microcode update Major 8161 Processor 02 unable to apply microcode update Major 8170 Processor 01 failed Self Test (BIST)
Page 199: Post Error Beep Codes
Short beep sounded whenever USB device is discovered in POST, or inserted or removed during runtime. 1 long Intel ® TXT security 0xAE, 0xAF System halted because Intel ® Trusted Execution violation Technology detected a potential violation of system security. Memory error Multiple System halted because a fatal error related to the memory was detected.
Page 200 Appendix E: POST Code Errors Technical Product Specification Beeps Error Message POST Progress Code Description Recovery failed Recovery has failed. This typically happens so quickly after recovery is initiated that it sounds like a 2-4 beep code. The following Beep Codes are from the BMC. 1-5-2-1 CPU socket CPU1 socket is empty, or sockets are populated...
Page 201: Appendix F: Statement Of Volatility
Technical Product Specification Appendix F: Statement of Volatility Appendix F: Statement of Volatility This Appendix describes the volatile and non-volatile components on the Intel Server Board ® S2600KP Product Family. It is not the intention of this document to include any components not directly on the listed Intel ®...
Page 202: User Data
BMC: The server boards support an Intelligent Platform Management Interface (IPMI)  2.0 conformant baseboard management controller (BMC). The BMC provides health monitoring, alerting and remote power control capabilities for the Intel ® Server Board. The BMC does not have access to operating system level data.
Page 203: Table 86. Glossary
External Product Specification Fault Resilient Booting Field Replaceable Unit 1024 MB GPIO General Purpose I/O Hot-Swap Controller Hertz (1 cycle/second) Inter-Integrated Circuit Bus Intel ® Architecture Independent Loading Mechanism Integrated Memory Controller Internet Protocol IPMB Intelligent Platform Management Bus IPMI...
Page 204 Glossary Technical Product Specification Term Definition Light Emitting Diode Least Significant Bit Logical Unit Number Media Access Control 1024KB Management Engine Milliseconds Most Significant Bit Network Interface Controller Nonmaskable Interrupt Non-Transparent Bridge Original Equipment Manufacturer PECI Platform Environment Control Interface Platform Event Filtering POST Power-On Self Test...
Page 205: Reference Documents
Server Board S2600KP Product Family and Intel ® Compute Module HNS2600KP  Product Family Service Guide Intel® Server System BIOS External Product Specification for Intel® Server Systems  supporting the Intel® Xeon® processor E5-2600 v3/v4 product family Intel ® Server System BMC Firmware External Product Specification for Intel ®...

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S2600kpr

Intel S2600KPFR Product Specifications

1 Introduction

2 Product Features Overview

3 Processor Support

4 Memory Support

5 Server Board I/O

6 Connector and Header

7 Configuration Jumpers

8 Intel Light-Guided Diagnostics

9 Platform Management

10 Thermal Management

11 System Security

12 Environmental Limits Specification

13 Power Supply Specification Guidelines

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