Board Power System - Xilinx ZCU106 User Manual

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PS_SRST_B Reset
Depressing and then releasing pushbutton SW3 causes net PS_SRST_B to strobe Low. This
reset is used to force a system reset. It can be tied or pulled High, and can be High during
the PS supply power ramps. When the voltage at IN2 is below its threshold or EN2 (P.B.
switch SW3 is pressed) goes Low, OUT2 (PS_SRST_B) goes Low.
Active-Low reset output RST_B asserts when any of the monitored voltages (IN_) falls below
the respective threshold, any EN_ goes Low, or MR is asserted. RST_B remains asserted for
the reset time-out period after all of the monitored voltages exceed their respective
threshold, all EN_ are High, all OUT_ are High, and MR is deasserted. See the Zynq
UltraScale+ MPSoC Technical Reference Manual (UG1085)
resets.

Board Power System

[Figure
2-1, callout 35]
The ZCU106 hosts a Maxim PMBus based power system. Each individual Maxim
MAX20751EKX, MAX15301, or MAX15303 voltage regulator has a PMBus interface.
Figure 3-48
shows the ZCU106 power system block diagram.
ZCU106 Board User Guide
UG1244 (v1.0) March 28, 2018
Chapter 3: Board Component Descriptions
www.xilinx.com
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