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5790A
Operators Manual
5-25. Checking 5790A Status
The programmer has access to status registers, enable registers, and queues in the 5790A
to indicate various conditions in the instrument as shown in Figure 5-1. Some registers
and queues are defined by the IEEE-488.2 standard. The rest are specific to the 5790A. In
addition to the status registers, the Service Request control line, SRQ, and a 16-element
buffer called the Error Queue provide status information. Table 5-4 lists the status
registers and gives the read/write commands and mask registers associated with each.
Each status register and queue has a summary bit in the Serial Poll Status Byte. Enable
registers are used to mask various bits in the status registers and generate summary bits in
the Serial Poll Status Byte. The Service Request Enable Register can be used to assert the
IEEE-488 Service Request (SRQ) control line on detection of any status condition or
conditions the programmer chooses.
5-26. Serial Poll Status Byte (STB)
The most important and frequently used register is the serial poll status byte (STB),
which the 5790A sends when it responds to a serial poll. This byte is cleared (set to 0)
when the power is turned on. The value of this byte at power-on is determined by the
value of the service request enable register (SRE), which is saved in nonvolatile memory.
Its bits are defined as follows (bits 1 and 0 are always 0).
If you are using the RS-232-C port as the remote control interface, transmitting the ^P
character returns the SPLSTR and the status byte. Also refer to the *STB? command in
Section 6 for more information.
5-27. Service Request Line (SRQ)
Service Request (SRQ) is an IEEE-488.1 bus control line that the 5790A asserts to notify
the controller that it requires some type of service. Many instruments can be on the bus,
but they all share a single SRQ line. To determine which instrument set SRQ, the
Controller normally does a serial poll of each instrument. The 5790A asserts SRQ
whenever the RQS bit in its Serial Poll Status Byte is 1. This bit informs the controller
that the 5790A was the source of the SRQ.
The 5790A clears SRQ and RQS whenever the controller performs a serial poll of the
5790A IEEE-488 interface, sends *CLS, or whenever the MSS bit is cleared. The MSS
bit is cleared only when RID, ESB, MAV, EAV, and ISCB are 0, or they are disabled by
their associated enable bits in the SRE register being set to 0.
5-28. Service Request Enable Register (SRE)
The Service Request Enable Register (SRE) enables or masks the bits of the Serial Poll
Status Byte. The SRE is cleared at power up. Refer to "Serial Poll Status Byte" for the bit
functions.
5-14
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