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Intel® Server Board S2400SC TPS
3.3.4
AHCI
The C600 chipset provides hardware support for Advanced Host Controller Interface (AHCI), a
standardized programming interface for SATA host controllers. Platforms supporting AHCI may
take advantage of performance features such as no master/slave designation for SATA
devices—each device is treated as a master—and hardware assisted native command queuing.
AHCI also provides usability enhancements such as Hot-Plug. AHCI requires appropriate
software support (for example, an AHCI driver) and for some features, hardware support in the
SATA device or additional platform hardware.
3.3.5
Rapid Storage Technology
The C600 chipset provides support for Intel
(see above for details on AHCI) and integrated RAID functionality. The industry-leading RAID
capability provides high-performance RAID 0, 1, 5, and 10 functionality on up to 6 SATA ports of
the C600 chipset. Matrix RAID support is provided to allow multiple RAID levels to be combined
on a single set of hard drives, such as RAID 0 and RAID 1 on two disks. Other RAID features
include hot-spare support, SMART alerting, and RAID 0 auto replace. Software components
include an Option ROM for pre-boot configuration and boot functionality, a Microsoft Windows*
compatible driver, and a user interface for configuration and management of the RAID capability
of the C600 chipset.
3.3.6
PCI Interface
The C600 chipset PCI interface provides a 33 MHz, Revision 2.3 implementation. The C600
chipset integrates a PCI arbiter that supports up to four external PCI bus masters in addition to
the internal C600 chipset requests. This allows for combinations of up to four PCI down devices
and PCI slots.
3.3.7
Low Pin Count (LPC) Interface
The C600 chipset implements an LPC Interface as described in the LPC 1.1 Specification. The
Low Pin Count (LPC) bridge function of the C600 resides in PCI Device 31: Function 0. In
addition to the LPC bridge interface function, D31:F0 contains other functional units including
DMA, interrupt controllers, timers, power management, system management, GPIO, and RTC.
3.3.8
Serial Peripheral Interface (SPI)
The C600 chipset implements an SPI Interface as an alternative interface for the BIOS flash
device. An SPI flash device can be used as a replacement for the FWH, and is required to
support Gigabit Ethernet and Intel
up to two SPI flash devices with speeds up to 50 MHz, utilizing two chip select pins.
3.3.9
Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)
The DMA controller incorporates the logic of two 82C37 DMA controllers, with seven
independently programmable channels. Channels 0–3 are hardwired to 8-bit, count-by-byte
transfers, and channels 5–7 are hardwired to 16-bit, count-by-word transfers. Any two of the
seven DMA channels can be programmed to support fast Type-F transfers. Channel 4 is
reserved as a generic bus master request.
Revision 2.0
®
Rapid Storage Technology, providing both AHCI
®
Active Management Technology. The C600 chipset supports
Intel order number G36516-002
Functional Architecture
35
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