Lup Option Test Patterns - JDS Uniphase CT-650 Reference Manual

LUP option test patterns

Table 13 Bridgetap patterns (Continued)
Pattern Name Bit Pattern
3 IN 19 F 1100 1000 0000 0000 000
3 IN 20 F 1100 0100 0000 0000 0000
3 IN 21 F 0100 0100 0000 0000 0000 1
3 IN 22 F 0100 0100 0000 0000 0000 10
3 IN 23 F 0100 0100 0000 0000 0000 100
3 IN 24 F 0100 0100 0000 0000 0000 0100
T1-QRSS 2
sion
a. F = Framing bit, shown in relative position to test pattern.
Table 14 Multipattern patterns
Pattern Name Bit Pattern
ALL ONES F 1111
1:7 F 0100 0000
2 IN 8 F 0100 0010
3 IN 24 F 0100 0100 0000 0000 0000 0100
20
T1-QRSS 2
a. F = Framing bit, shown in relative position to test pattern.
The following test patterns are only available when the LUP option is
installed.
– IBM80 (see Table 16 on page
– MIN_MAX (see Table 17 on page
– T1_2 (see Table 18 on page
– T1_3 (see Table 19 on page
CT-650 Command-Line Reference Guide
Appendix C Test Patterns and Loop Codes
a
20
-1 pseudorandom pattern with 14-zero suppres-
a
-1 pseudorandom pattern with 14-zero suppression
200)
201)
201)
202)
Release 9.4
LUP option test patterns
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