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PSC Interrupts
1. Set the EMUIHB bit in PDCTLx, the EMUIHB bit in MDCTL[x], and / or the EMURSTIE bit in MDCTL[x]
to enable the interrupt events that you want.
Note:
There is no enable bit for the external power control pending interrupt event, so effectively
this event is always enabled. The PSC interrupt is sent to the ARM interrupt controller when
at least one enabled event becomes active.
2. Enable the ARM's power and sleep controller interrupt (PSCINT) in the ARM interrupt controller. To
interrupt the ARM, PSCINT must be enabled in the ARM interrupt controller. See
information.
70
Power and Sleep Controller
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Chapter 8
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SPRUFB3 – September 2007
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