Deepsleep - Deep Sleep Mode Configuration; Deepsleep - Deep Sleep Mode Configuration Field Descriptions - Texas Instruments TMS320DM355 User Manual

System Control Register Descriptions

9.10.20 DEEPSLEEP - Deep Sleep Mode Configuration

The DEEPSLEEP register provides configuration for the Deep SLeep powerdown mode.
31 30 29
SLEEP SLEEP
ENABLE COMPLET
E
R/W-0 R-1
15
LEGEND: R = Read only; -n = value after reset
Table 9-22. DEEPSLEEP - Deep Sleep Mode Configuration Field Descriptions
Bit Field
31 SLEEPENABLE
30 SLEEPCOMPLET
E
29-16 RESERVED
15-4 COUNT
3 RESERVED
2 DRVVBUS_FORC
E
1 DRVVBUS_OVER
RIDE
0 RESERVED
142 System Control Module
Figure 9-19. DEEPSLEEP - Deep Sleep Mode Configuration
COUNT
R/W-0x176
Value Description
Enable Deep Sleep Mode
When enabled, driving GIO[0] low will initiate Deep Sleep and driving GIO[0] high will initiate
wakeup from Deep Sleep.
NOTE: After wakeup, Deep Sleep Mode must be disabled to reset the SLEEPCOMPLETE bit.
0 Disable Deep Sleep mode - normal operation
1 Enable Deep Sleep Mode
Deep Sleep Wakeup Completed
This bit must be reset to 0 before enabling or initiating Deep Sleep. The ARM should
1) Prepare the device / system for shutdown by placing DDR in auto_refresh and other powerdow
housekeeping as necessary and then
2) Enable Deep Sleep Mode (SLEEPENABLE=1) shut down
3) Inform the PMU/MCU it is ready for Deep Sleep
4) Go into a loop polling for this SLEEPCOMPLETE bit to be set, indicating it can proceed with
restarting the DDR and other device modules.
NOTE: After wakeup, Deep Sleep Mode must be disabled via SLEEPENABLE to reset this bit.
0 Normal operation or still asleep
1 Device is awake after Deep Sleep Mode
Reserved
Wakeup Delay Counter
Number of clock cycles (x 16) to count prior to enabling clocks. Used to insure oscillator is stable
before enabling clocks.
Reserved
USB_DRVVBUS Force Value
When DRVVBUS_OVERRIDE is enabled
USB_DRVVBUS Override
Overrides USB_DRVVBUS signal from USB controller and output DRVVBUS_FORCE instead
0 (NORMAL) USB Controller outputs USB_DRVVBUS
1 (OVERRIDE) Override USB_DRVVBUS
Reserved
RESERVED
R-0
4
RESV
R/W-1
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16
3 2 1 0
DRV DRV RESV
VBUS VBUS
_ _
FORC OVER
E RIDE
R/W-0 R/W-1 R/W-1
SPRUFB3 – September 2007
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