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9.1
Overview of the System Control Module
The DM355's system control module is a system-level module containing status and top-level control logic
required by the device. The system control module consists of a miscellaneous set of status and control
registers, accessible the ARM and supporting all of the following system features and operations:
• Device Identification
• Device Configuration
– Pin multiplexing control
– Device boot configuration status
• ARM Interrupt and EDMA Event multiplexing control
• Special Peripheral Status and Control
– Timer64+ control
– USB PHY control
– VPSS clock and Video DAC control and status
– DDR I/O timing control and status
– DDR VTP control
– Clock out circuitry
– GIO de-bounce control
• Power Managment
– Deep Sleep Control
• Bandwidth Management
– Bus master DMA priority control
This chapter describes the system control module.
9.2
Device Identification
The DEVICE_ID register of the System Control Module contains a software readable version of the JTAG
ID device. Software can use this register to determine the version of the device on which it is executing.
The register format and description are shown in
9.3
Device Configuration
The system control module contains registers for controlling pin multiplexing and registers that reflect the
boot configuration status.
9.3.1 Pin Multiplexing Control
DM355 makes extensive use of pin multiplexing to accommodate the large number of peripheral functions
in the smallest possible package. A combination of hardware configuration (at device reset) and program
control controls pin multiplexing to accomplish this. Hardware does not attempt to ensure that the proper
pin multiplexing is selected for the peripherals or that interface mode is being used.
112
System Control Module
System Control Module
Table 9-11
and
Table
9-14, respectively.
SPRUFB3 – September 2007
SPRUFB3 – September 2007
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