Register 144: Watchdog Timer Power Control (Pcwd), Offset 0X900; Table 5-16. Module Power Control - Texas Instruments TM4C1294NCPDT Datasheet

Register 144: Watchdog Timer Power Control (PCWD), offset 0x900

Important: The Watchdog Timer modules do not currently provide the ability to respond to the
The PCWD register controls the power applied to the Watchdog Module module. The function of
this bit depends on the current state of the device (Run, Sleep or Deep-Sleep mode) and value of
the corresponding bits in the RCGCWD, SCGCWD and DCGCWD registers. If the Rn, Sn, or Dn
bit of the respective RCGCWD, SCGCWD and DCGCWD registers is 1 and the device is in that
mode, the module is powered and receives a clock irrespective of what the corresponding Pn bit in
the PCWD register is.
However, if the Rn, Sn, or Dn bit of the respective RCGCWD, SCGCWD and DCGCWD registers
is 0 and the device is in that mode, then the module behaves differently depending on the value of
the corresponding Pn bit in the PCWD register. In this case, when the Pn bit is clear the module is
not powered and does not receive a clock. If the Pn bit is set, the module is powered but does not
receive a clock. The table below details the differences.

Table 5-16. Module Power Control

Rn, Sn or Dn Value in
Respective RCGCx,
SCGCx, or DCGCx
Register
0
0
1
Watchdog Timer Power Control (PCWD)
Base 0x400F.E000
Offset 0x900
Type RW, reset 0x0000.0003
31 30 29
Type RO RO RO
Reset 0 0 0
15 14 13
Type RO RO RO
Reset 0 0 0
Bit/Field Name
31:2 reserved
June 18, 2014
power down request. Setting a bit in this register has no effect on power consumption.
This register is defined for future software compatibility.
Pn Description
0 Module is not powered and does not receive a clock. In this case, the peripheral's
state is not retained.
This is the lowest power consumption state of any peripheral since it consumes no
dynamic nor leakage current. Hardware should perform a peripheral reset if the active
mode changes and the RCGCx, SCGCx, or DCGCx register is a 1 or the P0 bit is
changed to a 1.
Software must re-initialize the peripheral when re-enabled due to the loss of state.
1 Module is powered, but does not receive a clock.
In this case, the peripheral is inactive. This is the second-lowest power consumption
of any peripheral since it consumes only leakage current.
X Module is powered and receives a clock.
28 27 26 25
RO RO RO RO
0 0 0 0
12 11 10 9
reserved
RO RO RO RO
0 0 0 0
Type Reset
RO 0
Texas Instruments-Production Data
Tiva TM4C1294NCPDT Microcontroller
24 23 22 21
reserved
RO RO RO RO
0 0 0 0
8 7 6 5
RO RO RO RO
0 0 0 0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
20 19 18 17
RO RO RO RO
0 0 0 0
4 3 2 1
P1
RO RO RO RW
0 0 0 1
16
RO
0
0
P0
RW
1
451