Microprocessor - Motorola MTM800 User Manual

Tetra mobile terminal 450-470 mhz (mt512m) with enhanced control head
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4.1 - 18
5V_TX Linear Regulator U0304
Regulator U0304 gets its input voltage from the 9.3 volt regulator U0300. The output voltage 5V_TX
is fixed to 5 volts and is mainly used in the transmitter section.
3V3_DIG Voltage Follower Q0305
Transistor Q0305 is configured as voltage follower and gets its input voltage from the 5 volt regulator
U0303. The output voltage 3V3_DIG is set to 3.3 volts by the reference voltage 3V3_FN from
U5321. Diode D0303 compensates the base to emitter voltage drop of Q0305. The voltage is used
as supply voltage for modules connected to J0570.
3V_DIG Linear Regulator U0305
Regulator U0305 gets its input voltage from the 5 volt regulator U0303. The output voltage is fixed to
3 volts and is mainly used in the controller section to supply the I/O voltage.
1.55 V Linear Regulator U0306
Regulator U0306 gets its input voltage from the 5 volt regulator U0303. The output voltage is set to
1.55 volts with resistors R0318 and R0319 and is used in the controller section for supplying the
Patriot Bravo core.
1.8 V Linear Regulator U1105
Regulator U1105 gets its input voltage from the 3 volt regulator U0305. The output voltage is 1.8
volts and is used in the controller section for supplying the address and data bus voltage of the
patriot Bravo and for supplying the Flash and RAM memory.
4.6V VSF Voltage
The fractional N synthesizer U5331 creates the 4.6 volts super filter voltage (VSF). This voltage is
used for the main VCO.
RESET
The open drain Error outputs of the regulators U0304 (5V_TX), U0305 (3V_DIG), U0306 (1V55) as
well as the 2.8V voltage sense IC U0308 are connected together to create the LV_DETECT signal
which is the RESET_IN signal of Patriot Bravo. Furthermore the circuitry Q0341, Q0342, R0341,
R0342, R0343 generates a reset when a programming cable is disconnected from the terminal. The
reset sources share the pull up resistor R0344

Microprocessor

The Patriot Bravo dual core (DSP / RISC) processor (U1100, block 1 to 5) controls the terminal
hardware, communicates via various interfaces with external equipment or accessories and
performs digital signal processing. Beside its internal memory the Patriot Bravo uses the FLASH
Memory and the SRAM also located near to the controller. The Patriot Bravo exchanges digitized
audio data with the CODEC via its Serial Audio Port (SAP). The Patriot Bravo sends digital
baseband data to the ADDAG and receives digital baseband data from the ABACUS via its
Baseband Port (BBP). To communicate with the RF IC's the Patriot Bravo uses one of its Queued
Serial Peripheral Interfaces - the (QSPIA). A second interface, QSPIB, is used for communication
with external equipment or accessories. The Patriot Bravo has 2 universal asynchronous receiver /
transmitter ports (UARTA and UARTB) for communication with external equipment e.g. a Enhanced
Control Head or a control terminal (PC). UARTA communicates via SB9600, RS232 or USB protocol
and UARTB communicates via SBEP protocol.
THEORY OF OPERATION (TRANSCEIVER)

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