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6.21 Universal Serial Bus Host Controller (USB1) [USB1.1 OHCI]
All the USB interfaces for this device are compliant with Universal Serial Bus Specifications, Revision 1.1.
Table 6-92
is the list of USB Host Controller registers.
USB1
BYTE ADDRESS
0x01E2 5000
0x01E2 5004
0x01E2 5008
0x01E2 500C
0x01E2 5010
0x01E2 5014
0x01E2 5018
0x01E2 501C
0x01E2 5020
0x01E2 5024
0x01E2 5028
0x01E2 502C
0x01E2 5030
0x01E2 5034
0x01E2 5038
0x01E2 503C
0x01E2 5040
0x01E2 5044
0x01E2 5048
0x01E2 504C
0x01E2 5050
0x01E2 5054
0x01E2 5058
(1) Restrictions apply to the physical addresses used in these registers.
(2) Connected to the integrated USB1.1 phy pins (USB1_DM, USB1_DP).
(3) Although the controller implements two ports, the second port cannot be used.
Table 6-93. Switching Characteristics Over Recommended Operating Conditions for USB1 [USB1.1]
NO.
U1
t
Rise time, USB.DP and USB.DM signals
r
U2
t
Fall time, USB.DP and USB.DM signals
f
U3
t
Rise/Fall time matching
RFM
U4
V
Output signal cross-over voltage
CRS
U5
t
Differential propagation jitter
j
U6
f
Operating frequency
op
(1) Low Speed: C
= 200 pF. High Speed: C
L
(2) t
=( t
/t
) x 100
RFM
r
f
(3) t
= t
- t
jr
px(1)
px(0)
(4) f
= 1/t
op
per
Copyright © 2009–2017, Texas Instruments Incorporated
Table 6-92. USB Host Controller Registers
ACRONYM
HCREVISION
HCCONTROL
HCCOMMANDSTATUS
HCINTERRUPTSTATUS
HCINTERRUPTENABLE
HCINTERRUPTDISABLE
HCHCCA
HCPERIODCURRENTED
HCCONTROLHEADED
HCCONTROLCURRENTED
HCBULKHEADED
HCBULKCURRENTED
HCDONEHEAD
HCFMINTERVAL
HCFMREMAINING
HCFMNUMBER
HCPERIODICSTART
HCLSTHRESHOLD
HCRHDESCRIPTORA
HCRHDESCRIPTORB
HCRHSTATUS
HCRHPORTSTATUS1
HCRHPORTSTATUS2
PARAMETER
(1)
(2)
(1)
(3)
(4)
= 50pF
L
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SPRS590G – JUNE 2009 – REVISED JANUARY 2017
REGISTER DESCRIPTION
OHCI Revision Number Register
HC Operating Mode Register
HC Command and Status Register
HC Interrupt and Status Register
HC Interrupt Enable Register
HC Interrupt Disable Register
HC HCAA Address Register
HC Current Periodic Register
HC Head Control Register
HC Current Control Register
(1)
HC Head Bulk Register
HC Current Bulk Register
HC Head Done Register
HC Frame Interval Register
HC Frame Remaining Register
HC Frame Number Register
HC Periodic Start Register
HC Low-Speed Threshold Register
HC Root Hub A Register
HC Root Hub B Register
HC Root Hub Status Register
HC Port 1 Status and Control Register
HC Port 2 Status and Control Register
LOW SPEED
MIN
(1)
(1)
75
(1)
75
(2)
80
(1)
1.3
(3)
-25
Peripheral Information and Electrical Specifications
TMS320C6748
TMS320C6748
(1)
(1)
(1)
(1)
(1)
(1)
(2)
(3)
1.3V, 1.2V, 1.1V, 1.0V
FULL SPEED
MAX
MAX
MAX
(1)
(1)
300
4
20
(1)
(1)
300
4
20
(2)
(2)
120
90
110
(1)
(1)
2
1.3
2
(3)
(3)
25
-2
2
1.5
12
UNIT
(1)
ns
(1)
ns
(2)
%
(1)
V
(3)
ns
MHz
195
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