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C12
+3.3VIO
GND
0.1uF/16V
R17
U5
4.7k
1
2
JP1
3
2
4
1
24FC512-I/MF
GND
GND
U5
24FC512-I/MF
PowerPAD
GND
USB INPUT
R1
J1
1.50k
R2
+5V
FB5
27.4
1
5v
R3
2
220ohms/2A
Data-
3
27.4
C1
Data+
4
ID_NC
47pF/50V
FB6
5
GND
220ohms/2A
GND
GND
TI
PAGE INFO:
USB CONTROLLER
DESIGN LEAD
JOHN FEDAK IV
SLAU564A – February 2014 – Revised February 2014
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TLV320AIC3268RGC EVALUATION BOARD
+3.3VIO
+3.3VIO
Y1
1
4
OE
Vcc
2
3
C6
GND
OUT
+3.3VIO
+3.3VIO
6.0MHz
0.1uF/16V
GND
EE Program
+3.3VIO
JP2
GND
R13
R14
2.7k
2.7k
R16
8
4.7k
7
GND
6
5
C14
C15
1000pF/50V
GND
100pF/50V
+3.3VIO
48
47
46
45
44
43
42
41
R11
1
3.09k
C5
2
0.1uF/16V
3
4
GND
5
6
U2
7
TAS1020BPFB
C2
8
9
+3.3VIO
47pF/50V
10
C4
11
GND
12
0.1uF/16V
13 14 15 16 17 18 19 20 21 22 23 24
13 14 15 16 17 18 19 20 21 22 23 24
GND
GND
GND
LED2
LED1
Yellow
Yellow
R9
R8
+3.3VIO
+3.3VIO
649
649
R4
100k
USB RESET
RESETz
C3
S4
1.0uF/16V
GND
Figure 6. TAS1020BPFB USB Controller
Copyright © 2014, Texas Instruments Incorporated
TAS1020B
USB HOST ADAPTER
U3
1
OE
2
A
3
GND
LVC1G126DBVR
GND
(DAC Data)
TAS_DIN
TAS_BCLK
40
39
38
37
36
TAS_WCLK
35
34
+3.3VIO
33
32
C8
TAS_MISO
31
0.1uF/16V
TAS_MOSI
30
TAS_SSz
29
GND
28
27
TAS_SCLK
26
GND
25
R10
10k
JP3
1
2
+3.3VIO
GND
R5
R6
R7
10k
10k
10k
C10
0.1uF/16V
PATCH
GND
1
2
S1
APP
1
2
S2
DUT RESET
1
2
S3
C11
C9
C16
GND
0.1uF/50V
0.1uF/50V
0.1uF/50V
GND
GND
GND
TLV320AIC3268EVM-U EVM Schematics
TAS_SCL
TAS_SDA
+3.3VIO
C7
5
0.1uF/16V
VCC
GND
1
4
TAS_MCLK
Y
ASI_S1
2
3
I2S3_DOUT_SRC
4
I2S2_DOUT_SRC
5
TAS_DOUT
I2S1_DOUT
6
(ADC Data)
7
8
R12
10k
GND
GND
I2S_ENABLE
DUT_RESETz
DATE
JANUARY 31, 2014
FILENAME
AIP013C_Schematic.sbk
TLV320AIC3268EVM-U Evaluation Module
+3.3VIO
C13
U4
0.1uF/16V
16
GND
15
14
ASI_S0
13
R15
12
10k
11
10
GND
9
CBTLV3253DBQ
GND
SCH REV
C
PCB REV
C
SHEET
2
OF
11
DRAWN BY
L;DN
9
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