Block Diagram - Denon S-301 Service Manual

QQ
3 7 63 1515 0
M66005-0001AHP (IC301: 1U-3681)

BLOCK DIAGRAM

TE
L 13942296513
CS 14 Serial
receive
SCK 15
circuit
SDATA
16
XIN
21 Clock
generator
XOUT 20
RESET 13
www
Vcc1
19
Vcc2
60
Vss 22
.
Vp 32
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SEG02 49
50
SEG01
51
SEG00
Vcc2 52
53
DIG15/SEG39
DIG14/SEG38 54
55
DIG13/SEG37
DIG12/SEG36 56
M66005-0001AHP
57
DIG11
DIG10 58
59
DIG09
60
DIG08
DIG07 61
DIG06
62
DIG05 63
DIG04 64
Display code RAM
Bank 1 : 8bit x 16
Bank 2 : 8bit x 64
code
write
Code/
data
command
control
circuit
・ ・
・
timing
Display
clock
controller
・
・
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2 9
8
Q Q
3 6 7 1 3 1 5
・
CGROM
(35bit x 160)
・
CGRAM
dot data
(35bit x 16)
write
code
select
・
scan pulse
2
co
.
47
9 4 2 8
32
SEG19
31
SEG20
SEG21
30
SEG22
29
28 SEG23
27 SEG24
SEG25
26
SEG26
25
24
Vp
23
SEG27
22 SEG28
SEG29
21
20 SEG30
SEG31
19
18 SEG32
SEG33
17
0 5 8 2 9 9 4 2 8
・
. . .
. . .
SEG00
59
Segment
33
output
. . .
. . .
31
circuit
24
SEG35
23
DIG12/
Segment/
64
SEG36
Digit
DIG13/
63
SEG37
select/
DIG14/
62
output
SEG38
DIG15/
circuit
61
SEG39
DIG00
12
. . . .
Digit
output
. .
circuit
・
1
m
P0
18
17 P1
S-301
9 9
9 9
. . .
SEG26
. . .
SEG27
SEG34
. .
.
DIG11