Denon S-301 Service Manual page 19

QQ
3 7 63 1515 0
Name
DSCK
DCLK
YUV0
CAMIN2
UDAC
TE
L 13942296513
YUV1
VREF
YUV2
CDAC
YUV3
COMP
YUV4
RSET
ADVEE
www
.
http://www.xiaoyu163.com
p ( )
Pin Numbers I/O Definition
102 O Output clock to DRAM.
105 I Clock input to PLL.
O YUV pixel 2 output data.
I Camera YUV 2.
O Video DAC output.
106
F: CVBS/chroma signal for simultaneous mode.
Y: Luma component for YUV and Y/C processing.
C: Chrominance signal for Y/C processing.
U: Chrominance component signal for YUV mode.
V: Chrominance component signal for YUV mode.
O YUV pixel 1 output data.
107
I Internal voltage reference to video DAC. Bypass to ground with 0.1-µF capacitor.
O YUV pixel 2 output data.
108
O Video DAC output. Refer to description and matrix for UDAC pin 106.
O YUV pixel 3 output data.
109
I Compensation input. Bypass to ADVEE with 0.1-µF capacitor.
O YUV pixel 4 output data.
110
I DAC current adjustment resistor input.
111 P Analog power for video DAC.
x ao
y
i
http://www.xiaoyu163.com
8
Pin 115
Value F DAC V DAC
0 CVBS/Chroma CVBS1
1 CVBS/Chroma CVBS1
2 CVBS/Chroma
3 CVBS/Chroma CVBS1
4 CVBS/Chroma CVBS1
5 CVBS/Chroma CVBS1
6 CVBS/Chroma
7 N/A
8 CVBS/Chroma Chroma
9 CVBS CVBS1
10 CVBS CVBS1
11 N/A
Q Q
3 6 7 1 3
12 CVBS/Chroma
13 CVBS/Chroma CVBS1
14 Chroma
u163
.
19
2 9 9 4 2 8
114 113 108
Y DAC C DAC
Y C
Y C
N/A Y C
N/A N/A
N/A N/A
Y Pb
N/A Y Pb
SYNC G B
Y Pb
G B
G R
SYNC G R
1 5 0 5 8 2 9 9 4
N/A Y Pr
Y Pr
Y G R
m
co
S-301
9 9
106
U DAC
N/A
CVBS2
N/A
CVBS2
N/A
Pr
Pr
R
Pr
R
B
B
2 8 9 9
Pb
Pb
B