Block Diagram - Denon S-101 Service Manual

QQ
3 7 63 1515 0
M66005-0001AHP (IC301: 1U-3681)

BLOCK DIAGRAM

TE
L 13942296513
CS 14 Serial
receive
SCK 15
circuit
SDATA
16
XIN
21 Clock
generator
XOUT 20
RESET 13
Vcc1
19
www
Vcc2
60
Vss 22
Vp 32
.
http://www.xiaoyu163.com
49
SEG02
50
SEG01
51
SEG00
Vcc2 52
53
DIG15/SEG39
54
DIG14/SEG38
DIG13/SEG37 55
56
DIG12/SEG36
M66005-0001AHP
57
DIG11
DIG10 58
DIG09 59
DIG08 60
DIG07 61
DIG06 62
DIG05 63
DIG04
64
Display code RAM
Bank 1 : 8bit x 16
Bank 2 : 8bit x 64
code
write
Code/
data
command
control
circuit
timing
Display
clock
controller
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
Q Q
3 6 7 1 3 1 5
CGROM
(35bit x 160)
CGRAM
dot data
(35bit x 16)
write
code
select
scan pulse
2
co
.
23
9 4 2 8
32
SEG19
31
SEG20
30 SEG21
29 SEG22
28 SEG23
SEG24
27
26 SEG25
25 SEG26
24
Vp
23
SEG27
22 SEG28
21 SEG29
20 SEG30
SEG31
19
18
SEG32
SEG33
17
0 5 8 2 9 9 4 2 8
. . .
. . .
59
Segment
33
output
. . .
. . .
31
circuit
24
23
Segment/
64
Digit
63
select/
62
output
circuit
61
12
. . . .
Digit
output
. .
circuit
1
m
P0
18
17 P1
S-101
9 9
9 9
. . .
SEG00
SEG26
. . .
SEG27
SEG34
SEG35
DIG12/
SEG36
DIG13/
SEG37
DIG14/
SEG38
DIG15/
SEG39
DIG00
. .
.
DIG11