Table of Contents
Advertisement
Index
triggering, 5-4
troubleshooting, B-2
ANSI C documentation, xvii
AO FIFO, 5-1
AO Pause Trigger signal, 5-6
AO Sample Clock signal, 5-8
AO Sample Clock Timebase signal, 5-9
AO Start Trigger signal, 5-5
ao/PauseTrigger, 5-6
ao/SampleClock, 5-8
ao/SampleClockTimebase, 5-9
ao/StartTrigger, 5-5
applications
counter input, 7-3
counter output, 7-21
edge counting, 7-3
arm start trigger, 7-32
avoiding scanning faster than necessary, 4-9
B
block diagram
PFI input circuitry, 8-1
PFI output circuitry, 8-2
buffered
edge counting, 7-4
non-cumulative, 7-5
hardware-timed acquisitions, 4-10
hardware-timed generations, 5-3
period measurement, 7-8
pulse-width measurement, 7-6
semi-period measurement, 7-10
two-signal edge-separation
measurement, 7-20
bus
interface, 11-1
RTSI, 10-3
NI 6238/6239 User Manual
C
cables, 2-4, A-3, A-6
choosing for your device, 1-2
custom, 2-4
calibration certificate (NI resources), C-2
calibration circuitry, 2-3
cascading counters, 7-33
changing data transfer methods between DMA
and IRQ, 11-4
channel Z behavior, 7-17
channels, sampling with AI Sample Clock and
AI Convert Clock, B-2
charge injection, B-1
circular-buffered acquisition, 4-11
clock
10 MHz reference, 10-3
external reference, 10-2
generation, 10-1
PXI, and trigger signals, 10-7
routing, 10-1
common-mode noise, 9-3
CompactPCI, using with PXI, 11-3
configuring, ground-reference settings in
software, 4-5
connecting
analog current input signals, 4-3
analog current output signals, 5-4
counter signals, B-3
digital I/O signals, 6-2, 8-6
PFI input signals, 8-3
connector, A-1, A-4
information, 3-1
RTSI, 3-3, 10-4
considerations
for field wiring, 4-11
for multichannel scanning, 4-8
for PXI, 11-2
continuous pulse train generation, 7-23
controllers, DMA, 11-1
controlling counting direction, 7-3
I-2
ni.com
Advertisement
Table of Contents
