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RTSI, PFI, or
PXI_STAR Terminal
Filter Clock
(40 MHz)
Filtered Input
I/O Protection
© National Instruments Corporation
Clocks Needed
Filter Setting
to Pass Signal)
125 ns
6.425 µs
2.55 ms
Disabled
The filter setting for each input can be configured independently. On power
up, the filters are disabled. Figure 8-4 shows an example of a low-to-high
transition on an input that has its filter set to 125 ns (N = 5).
1
1
2
3
4
Enabling filters introduces jitter on the input signal. For the 125 ns and
6.425 µs filter settings, the jitter is up to 25 ns. On the 2.55 ms setting, the
jitter is up to 10.025 µs.
When a PFI input is routed directly to RTSI, or a RTSI input is routed
directly to PFI, the M Series device does not use the filtered version of the
input signal.
Refer to the KnowledgeBase document, Digital Filtering with M Series
and CompactDAQ, for more information about digital filters and counters.
To access this KnowledgeBase, go to
code
.
rddfms
Each DI, DO, and PFI signal is protected against overvoltage and
undervoltage conditions as well as ESD events on NI 6238/6239 devices.
Table 8-1. Filters
N (Filter
Pulse Width
Guaranteed to
Pass Filter
5
125 ns
257
6.425 µs
~101,800
2.55 ms
—
1
2
3
4
5
Figure 8-4. Filter Example
ni.com/info
8-5
Chapter 8
Pulse Width
Guaranteed to
Not Pass Filter
100 ns
6.400 µs
2.54 ms
—
—
Filtered input goes high
when terminal is sampled
high on five consecutive
filter clocks.
and enter the info
NI 6238/6239 User Manual
PFI
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