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Axis <1..4> Reverse
Limit Input
B
b
base address
binary
buffer
bus
byte
C
CCW
closed-loop
common
CPU
crosstalk
CSR
CW
© National Instruments Corporation
axis 1 through 4 reverse/counter-clockwise limit input
bit—one binary digit, either 0 or 1
memory address that serves as the starting address for programmable or
I/O bus registers. All other addresses are located by adding to the base
address.
a number system with a base of 2
temporary storage for acquired or generated data (software)
the group of conductors that interconnect individual circuitry in a computer.
Typically, a bus is the expansion vehicle to which I/O or other devices are
connected.
eight related bits of data, an eight-bit binary number. Also used to denote
the amount of memory required to store one byte of data.
counter-clockwise—implies direction of rotation of the motor
a motion system that uses a feedback device to provide position and
velocity data for status reporting and accurately controlling position and
velocity
reference signal for digital I/O
central processing unit
an unwanted signal on one channel due to an input on a different channel
Communications Status Register
clockwise—implies direction of motor rotation
G-3
Glossary
7344/7334 Hardware User Manual
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