Denon DN-D9000 Service Manual page 12

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Pin
Pin Name
Symbol
No.
26
PC3
MUTE
27
XI
XI
28
XO
XO
29
VDD
VDD
30
OSCI
OSCI
31
OSCO
OSCO
32
VSS
VSS
33
BOSC
32.0MHz
34
PC5,NMI_
RESERVE
35
RST_
RST_
36
PC0
LEDOUT1
37
P76
LEDOUT2
38
P60,IRQ0
JOGINT1
39
P61,IRQ1
JOGINT2
40
P62,IRQ2
DTIMA1
41
P63,IRQ3
DTIMB1
42
P64,IRQ4
ATANS_
43
P65,IRQ5
DTIMA2
44
P66,IRQ6
DTIMB2
45
P67,IRQ7
RESERVE
46
P70
YMCLK
47
P71
YMDATA
48
PD2,DMAACK0_
NRES_
49
PD3,DMAREQ0_
ZSENCE1
50
VDD
VDD
51
P77
ZSENCE2
52
P72
MDO
53
P73
YMLD1_
54
P74
YMLD2
55
P75
ML
56
PA0,SBI0
RXD1
57
PA1,SBO0
TXD1
58
PA2,SBT0
MCMD_
59
PA3,SBI1
RXD2
60
PA4,SBO1
TXD2
61
PA5
ATDIR
62
PB0,SBI2
X'RXD
63
PB1,SBO2
X'TXD
64
PB2
APRES_
65
PB3,SBI3
ATDATA
66
PB4,SBO3
MDATA
67
PB5,SBT3
MCLK
68
VDD
VDD
69
VSS
VSS
70
AVSS
AVSS
71
Vref−
Vref−
72
P80
DFLG12
73
P81
DFLG11
74
P82
DR_/W1
75
P83
DACK1_
76
P84
DBSY1_
77
P85
DFLG10
78
P86
DREQ1_
79
P87
DR_/W2
80
PD4
DACK2_
81
PD5
DBSY2_
82
P90
DFLG20
83
P91
DREQ2_
84
P92
DFLG21
85
P93
DFLG22
86
Vref+
Vref+
87
AVDD
AVDD
I/O
DET
Ext
Ini
Res
O
Pu
H
I
O
I
O
O
I
Pu
H
I
O
Pu
H
O
Pu
H
I
(Pu)
H
I
(Pu)
H
I
(Pu)
H
I
Pu
H
I
Pu
I
Pu
H
I
Pu
H
O
H
O
H
O
H
O
Pd
L
I
I
I
Pd
O
H
O
H
O
H
I
(Pu)
O
Pu
H
O
Pu
H
I
(Pu)
O
Pu
H
O
H
I
(Pu)
O
Pu
H
O
Pd
L
I
Pu
O
Pu
H
O
Pd
H
I/O
Pu
I/O
Pu
O
H
I
Pu
H
I
Pu
H
I/O
Pu
O
(Pu)
H
O
H
I
Pu
H
I
Pu
H
I/O
Pu
O
(Pu)
H
I/O
Pu
I/O
Pu
Function
H
Mute signal (H: Mute)
Oscillation input
Oscillation output
Power (+3.3V)
Oscillation input, 32.0MHz
Oscillation output
GND
System clock output
H
µcom reset
H
TRAY1 LED
H
TRAY2 LED
H
JOGA pulse input for CD1 scratch
H
JOGA pulse input for CD2 scratch
H
CD1 main playback clock input
H
CD1 monitor playback clock input
ATAPI µcom serial interface
H
H
CD2 main playback clock input
H
CD2 monitor playback clock input
Clock for SM5902(DOUT)/PCM1608(D/A) data
SM5902(DOUT)/PCM1608(D/A) output data
L
SM5902(DOUT)/PCM1608(D/A) reset signal
SM5902 µcom interface status for CD1
Power (+3.3V)
SM5902 µcom interface status for CD2
L
PCM1608(D/A) input data
SM5902(DOUT) chip select for CD1
SM5902(DOUT) chip select for CD2
PCM1608(D/A) chip select
H
Data receive from RC CD1
Data send to RC CD1 (PU µcom specify)
H
ATAPI µcom serial interface (PU µcom specify)
H
H
Data receive from RC CD2
H
Data send to RC CD2
Not used
H
Data receive from X'EFFECT
H
Data send to X'EFFECT
ATAPI µcom reset signal (CD1, CD2 common)
L
ATAPI µcom serial receive signal
H
ATAPI µcom serial send signal
H
ATAPI µcom serial send/receive clock
L
Power (+3.3V)
GND
Analog ref. GND for A/D conversion, GND
Analog ref. V for A/D conversion, GND
H
DSP1 general flag 2
H
DSP1 general flag 1
DSP1 interface send/receive select signal
H
DSP1 interface ACK
H
DSP1 interface busy signal
H
DSP1 general flag 0
H
DSP1 interface request signal
DSP2 interface send/receive select signal
H
DSP2 interface ACK
H
DSP2 interface busy signal
H
DSP2 general flag 0
H
DSP2 interface request signal
H
DSP2 general flag 1
H
DSP2 general flag 2
Analog ref. V for A/D conversion, +3.3V
Power (+3.3V)
DN-D9000
12

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