JVC MX-G500 Service Manual page 40

MX-G500
LC86P6548 (UIC1) : Microcontroller
1.Pin layout
S48/PG0
S49/PG1
S50/PG2
S51/PG3
P00
P01
P02
P03
VSS2
VDD2
P04
P05
P06
P07
P10/SO0
P11/SI0/SB0
P12/SCK0
P13/SO1
P14/SI1/SB1
P15/SCK1
2.Block diagram
Interrupt Control
Standby Control
Base Timer
SIO0
SIO1
Timer 0
Timer 1
ADC
INT0-3
Noise Filt er
SIO Automatic
transmission
RAM
128 by tes
VFD
Controller
High voltage Output
1-40
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
CF
RC
X' tal
Bus Interface
Port 1
Port 3
Port 7
Port 8
S19/PC3
50
S18/PC2
49
S17/PC1
48
47 S16/PC0
VDD3
46
S15/T15
45
S14/T14
44
43 S13/T13
S12/T12
42
S11/T11
41
40 S10/T10
39 S9/T9
S8/T8
38
S7/T7
37
36 S6/T6
S5/T5
35
S4/T4
34
S3/T3
33
32 S2/T2
S1/T1
31
IR PLA
A15-A0
D7-D0
PROM
TA
Control CE
OE
DASEC
PROM(48KB)
PC
ACC
B Register
C Register
ALU
PSW
RAR
RAM
Stack Poi nter
Port 0
Watchdog Timer