Silicon Laboratories EFM32TG Manuals

Manuals and User Guides for Silicon Laboratories EFM32TG. We have 1 Silicon Laboratories EFM32TG manual available for free PDF download: Reference Manual

Silicon Laboratories EFM32TG Reference Manual (543 pages)

Brand: Silicon Laboratories | Category: Microcontrollers | Size: 8 MB

1 Energy Friendly Microcontrollers

2
- Typical Applications
  2
- EFM32TG Development
  2
2 About this Document

3
- Conventions
  3
- Register Access Types
  3
- Related Documentation
  4
3 System Overview

5
- Introduction
  5
- Features
  5
- Block Diagram
  6
- Energy Modes
  7
- Product Overview
  8
- EFM32TG Microcontroller Series
  8
- Device Revision
  10
4 System Processor

11
- Introduction
  11
- Features
  11
- Functional Description
  12
- Interrupt Operation
  12
  - Interrupt Request Lines (IRQ)
    12
5 Memory and Bus System

14
6 DBG - Debug Interface

25
- Introduction
  25
- Features
  25
- Functional Description
  25
- Debug Lock and Device Erase
  26
- Device Unlock
  27
- AAP Expansion
  27
  - Register Map
    28
  - Register Description
    28
7 MSC - Memory System Controller

30
- Introduction
  30
- Instruction Cache
  30
  - Features
    31
  - Functional Description
    31
  - Lock Bits
    32
  - Register Map
    37
  - Register Description
    37
8 DMA - DMA Controller

46
- Introduction
  46
- Features
  46
- Block Diagram
  47
- Functional Description
  48
- DMA Cycle Types
  50
- Channel_Cfg for a Primary Data Structure, in Memory Scatter-Gather Mode
  54
- Memory Scatter-Gather Example
  55
  - Channel_Cfg for a Primary Data Structure, in Peripheral Scatter-Gather Mode
    56
- Peripheral Scatter-Gather Example
  57
- Channel_Cfg Bit Assignments
  61
  - Examples
    65
  - Register Map
    67
  - Bus
    67
  - Register Description
    68
9 RMU - Reset Management Unit

85
- Introduction
  85
- Features
  85
- Functional Description
  85
- Register Map
  89
- Register Description
  89
10 EMU - Energy Management Unit

91
- Introduction
  91
- Features
  91
- Functional Description
  92
- EMU Overview
  92
  - Register Map
    97
  - Register Description
    97
11 CMU - Clock Management Unit

99
- Introduction
  99
- Features
  99
- Functional Description
  100
- CMU Overview
  101
- CMU Switching from HFRCO to HFXO before HFXO Is Ready
  104
- CMU Switching from HFRCO to HFXO after HFXO Is Ready
  105
- Continuous Calibration (CONT=1)
  107
  - Register Map
    109
  - Lcd
    109
  - Register Description
    110
  - Lcd
    125
12 WDOG - Watchdog Timer

130
- Introduction
  130
- Features
  130
- Functional Description
  130
- WDOG Timeout Equation
  131
- Register Map
  132
- Register Description
  132
13 PRS - Peripheral Reflex System

135
- Introduction
  135
- Features
  135
- Functional Description
  135
- PRS Overview
  136
  - Register Map
    140
  - Register Description
    140
  - I 2 C - Inter-Integrated Circuit Interface
    145
  - Introduction
    145
  - Features
    145
  - Functional Description
    146
  - C Pull-Up Resistor Equation
    146
14 I C - Inter-Integrated Circuit Interface

145
- C START and STOP Conditions
  147
  - C High and Low Periods for Low CLKDIV
    150
  - C Maximum Transmission Rate
    150
  - C High and Low Cycles Equations
    150
  - Maximum Data Hold Time
    150
- C Master State Machine
  153
  - C Interactions in Prioritized Order
    154
- C Slave State Machine
  160
  - Register Map
    167
  - Register Description
    167
15 USART - Universal Synchronous Asynchronous Receiver/Transmitter

179
- Introduction
  179
- Features
  179
- Functional Description
  180
- USART Overview
  180
- USART Asynchronous Frame Format
  181
  - USART Asynchronous Vs. Synchronous Mode
    181
  - USART Pin Usage
    181
  - USART Data Bits
    182
  - USART Stop Bits
    182
  - USART Baud Rate
    183
  - USART Desired Baud Rate
    183
- USART Sampling of Start and Data Bits
  188
- USART Sampling of Stop Bits When Number of Stop Bits Are 1 or more
  189
- USART Transmission of Large Frames
  192
- USART ISO 7816 Data Frame Without Error
  194
- USART ISO 7816 Data Frame with Error
  195
  - USART SPI Modes
    196
  - USART Synchronous Mode Bit Rate
    196
  - USART Synchronous Mode Clock Division Factor
    196
- USART Standard I2S Waveform
  199
  - USART I2S Modes
    199
  - Register Map
    205
  - Register Description
    205
16 LEUART - Low Energy Universal Asynchronous Receiver/Transmitter

225
- Introduction
  225
- Features
  225
- Functional Description
  226
- LEUART Baud Rates
  228
- LEUART Baud Rate Equation
  228
- LEUART CLKDIV Equation
  228
- LEUART Optimal Sampling Point
  232
- LEUART Actual Sampling Point
  232
- Register Map
  237
- Register Description
  237
17 TIMER - Timer/Counter

251
- Introduction
  251
- Features
  251
- Functional Description
  252
- TIMER Quadrature Encoded Inputs
  256
- TIMER Quadrature Decoder Configuration
  256
- TIMER Input Capture Buffer Functionality
  259
- TIMER Input Capture
  260
- TIMER Up-Count Frequency Generation
  262
- TIMER Up-Count PWM Generation
  262
  - TIMER Up-Count PWM Resolution Equation
    262
  - TIMER Up-Count PWM Frequency Equation
    262
- TIMER CC out in 2X Mode
  263
- TIMER Up/Down-Count PWM Generation
  264
  - TIMER Up/Down-Count PWM Resolution Equation
    264
  - TIMER Up/Down-Count PWM Frequency Equation
    264
  - TIMER Up/Down-Count Duty Cycle Equation
    264
  - TIMER 2X PWM Resolution Equation
    264
  - TIMER Events
    265
  - TIMER 2X Mode PWM Frequency Equation( Up/Down-Count)
    265
  - TIMER 2X Mode Duty Cycle Equation
    265
  - Register Map
    266
  - Register Description
    267
18 RTC - Real Time Counter

285
- Introduction
  285
- Features
  285
- Functional Description
  286
- RTC Overview
  286
  - RTC Frequency Equation
    286
  - Register Map
    289
  - Register Description
    289
19 LETIMER - Low Energy Timer

294
- Introduction
  294
- Features
  294
- Functional Description
  295
- LETIMER Clock Frequency
  300
- LETIMER Triggered Operation
  304
- LETIMER Continuous Operation
  305
  - Register Map
    308
  - Register Description
    308
20 PCNT - Pulse Counter

317
- Introduction
  317
- Features
  317
- Functional Description
  317
- PCNT Overview
  318
21 LESENSE - Low Energy Sensor Interface

332
- Introduction
  332
- Features
  332
- Functional Description
  333
- Scan Sequence
  335
  - Scan Frequency
    335
- Pin Sequencing
  337
  - Bias Configuration
    342
- Capacitive Sense Setup
  344
- LC Sensor Setup
  344
  - LESENSE Decoder Configuration
    347
  - Register Map
    348
  - Register Description
    349
22 ACMP - Analog Comparator

378
- Introduction
  378
- Features
  378
- VDD Scaled
  378
- Functional Description
  379
- ACMP Overview
  379
- Capacitive Sensing Set-Up
  382
  - Register Map
    383
  - Register Description
    383
23 VCMP - Voltage Comparator

389
- Introduction
  389
- Features
  389
- Functional Description
  390
- VCMP Overview
  390
  - DD Trigger Level
    391
  - Register Map
    393
  - Register Description
    393
24 ADC - Analog to Digital Converter

397
- Introduction
  397
- Features
  397
- Functional Description
  398
- ADC Overview
  399
  - ADC Total Conversion Time (in ADC_CLK Cycles) Per Output
    399
- ADC Conversion Timing
  400
  - ADC Temperature Measurement
    402
- ADC Conversion Tailgating
  404
  - Calibration Register Effect
    407
  - Register Map
    408
  - Register Description
    408
25 DAC - Digital to Analog Converter

421
- Introduction
  421
- Features
  421
- Functional Description
  422
- DAC Overview
  422
  - DAC Clock Prescaling
    423
  - DAC Single Ended Output Voltage
    424
  - DAC Differential Output Voltage
    424
- DAC Sine Mode
  425
  - DAC Sine Generation
    425
  - Register Map
    427
  - Register Description
    427
26 OPAMP - Operational Amplifier

442
- Introduction
  442
- Features
  442
- Functional Description
  443
- OPAMP Overview
  444
- Voltage Follower Unity Gain Overview
  446
  - General Opamp Mode Configuration
    446
  - Voltage Follower Unity Gain Configuration
    446
- Inverting Input PGA Overview
  447
- Non-Inverting PGA Overview
  447
  - Inverting Input PGA Configuration
    447
  - Non-Inverting PGA Configuration
    447
- Cascaded Inverting PGA Overview
  448
27 AES - Advanced Encryption Standard Accelerator

453
- Introduction
  453
- Features
  453
- Functional Description
  453
- Register Map
  457
- Register Description
  457
28 GPIO - General Purpose Input/Output

465
- Introduction
  465
- Features
  465
- Functional Description
  466
- Pin Configuration
  467
- EM4 WU Register Bits to Pin Mapping
  470
- Register Map
  473
- Register Description
  474
29 LCD - Liquid Crystal Display Driver

490
- Introduction
  490
- Features
  490
- Functional Description
  491
- LCD Mux Settings
  492
- LCD BIAS Settings
  492
- LCD Wave Settings
  493
- LCD Contrast
  505
- LCD Contrast Function
  505
- LCD Principle of Contrast Adjustment for Different Bias Settings
  506
- Lcd
  507
- Boost
  507
- LCD Frame Rate Conversion Table
  508
- LCD Frame Rate Calculation
  508
- LCD Update Data Control (UDCTRL) Bits
  509
- DSC BIAS Encoding
  509
- Fcpresc
  510
- LCD Event Frequency Equation
  510
- LCD Animation Shift Register
  511
- LCD Animation Pattern
  511
- LCD Animation Example
  512
- Register Map
  514
- Register Description
  514
- Bias Configuration
  516
30 Revision History

526
- Revision 1.20
  526
- Revision 1.10
  526
- Revision 1.00
  527
- Revision 0.90
  528
- Revision 0.80
  528
- Abbreviations
  529
- Disclaimer and Trademarks
  531
  - Disclaimer
    531
  - Trademark Information
    531
- Contact Information
  532

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Silicon Laboratories EFM32TG Manuals

Silicon Laboratories EFM32TG Reference Manual (543 pages)

Table of Contents

1 Energy Friendly Microcontrollers

2 About this Document

3 System Overview

4 System Processor

5 Memory and Bus System

6 DBG - Debug Interface

7 MSC - Memory System Controller

8 DMA - DMA Controller

9 RMU - Reset Management Unit

10 EMU - Energy Management Unit

11 CMU - Clock Management Unit

12 WDOG - Watchdog Timer

13 PRS - Peripheral Reflex System

14 I C - Inter-Integrated Circuit Interface

15 USART - Universal Synchronous Asynchronous Receiver/Transmitter

16 LEUART - Low Energy Universal Asynchronous Receiver/Transmitter

17 TIMER - Timer/Counter

18 RTC - Real Time Counter

19 LETIMER - Low Energy Timer

20 PCNT - Pulse Counter

21 LESENSE - Low Energy Sensor Interface

22 ACMP - Analog Comparator

23 VCMP - Voltage Comparator

24 ADC - Analog to Digital Converter

25 DAC - Digital to Analog Converter

26 OPAMP - Operational Amplifier

27 AES - Advanced Encryption Standard Accelerator

28 GPIO - General Purpose Input/Output

29 LCD - Liquid Crystal Display Driver

30 Revision History

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