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2.3.2

Chipset

Advanced
DRAM Clock/Drive Control
Frequency/Voltage control
Top Performance
Primary Display Adapter
VGA Share Memory Size
F1:Help
↑↓ : Select Item
ESC: Exit
→←: Select Menu
DRAM Clock/Drive Control
Advanced
DRAM Clock/Drive Control
Current DRAM Frequency
DRAM Frequency
DRAM Timing Selectable
x
CAS Latency Time
x
Bank Interleave
x
Precharge to Active(Trp)
x
Active to Prechrage(Tras)
x
Active to CMD(Trcd)
x
REF to ACT/REF (Trfc)
x
Act(0) to ACT(1) (TRRD)
F1:Help
↑↓ : Select Item
F1:Help
↑↓ : Select Item
ESC: Exit
→←: Select Menu
ESC: Exit
→←: Select Menu
Current DRAM Frequency [266Mhz]
This item is not configurable.
DRAM Frequency [Auto]
Sets the DDR2 operating frequency.
Configuration options: [Auto] [400MHz] [533MHz] [667MHz]
DRAM Timing Selectable [By SPD]
When this item is set to [By SPD], the DRAM timing parameters are set
according to the DRAM SPD (Serial Presence Detect). When set to [Manual],
you can manually set the DRAM timing parameters through the DRAM
sub-items. The following sub-items appear when this item is set to [Manual].
Configuration options: [Manual] [By SPD]
ASUS P5VDC-TVM TE
Phoenix - AwardBIOS CMOS Setup Utility
Chipset
[Disabled]
[PCI-E]
[64MB]
-/+: Change Value
Enter: Select SubMenu
Phoenix - AwardBIOS CMOS Setup Utility
266
MHz
[Auto]
[By SPD]
4
4 Bank
3T
11T
3T
27T/28T
3T
-/+: Change Value
-/+: Change Value
Enter: Select SubMenu
Enter: Select SubMenu
Select Menu
Item Specific Help
F5: Setup Defaults
F10: Save and Exit
Select Menu
Item Specific Help
Support DDR Frequency
from 333Mhz to 667 Mhz
F5: Setup Defaults
F5: Setup Defaults
F10: Save and Exit
F10: Save and Exit
2-13

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