LG GD310 Service Manual page 90

5.12.2. Checking PLL Control signals
Checking Points
TP1 (RF_EN)
Figure 5. Transceiver
RF Transceiver Circuit Diagram
C404
100n
FE2
VBIAS
VDDTX1V5 VDDRX2V8
5 20
TX1 VDDRX1V5
R403
6 19
TX2 VCO_RC
18 820
VDDTX2V8 VDDVCO2V8
8 17
VDDMIX2V8 EN
9 16
GND3 VDDXO2V8
0 15
FSYS1
14
GND4 GND1
1 13
X400 NX3225SA
4
GND2 HOT2
1
HOT1 GND1
26MHZ
Figure 6. Transceiver Circuit
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Only for training and service purposes
TP3 (RF_CLK)
TP2 (RF_DATA)
U400
C432 C419 C418
100n 100n 100n
C406 47N
C405 1000P
TP1
TP1
3
2
TP3
TP2
BT_CLK
TP3
RF_CLK
RF_DA
TP2
QX
Q
IX
I
Checking Flow
EN Signal(TP1) is OK ?
Yes
DA(Data,TP2) is Normal ?
Yes
CLK(Clock,TP3) is Normal ?
Yes
Control Signal is OK.
See next page to check
Mobile SW & FEM.
RF_DATA(TP2)
RF_EN
26MHZ_MCLK
RF_CLK(TP3)
RF_EN(TP1)
Figure 7. PLL Control Waveform
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5. TROUBLE SHOOTING
No Check U400
Check U400
No
No
Check U400
Waveform
LGE Internal Use Only