Sony HCD-GN100D Service Manual page 77

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Pin No. Pin Name
96
97 MDQM3
98
99 to 102 MD28 to MD31
103
104
105
106 XCK_I/O_SEL
107
108
109
110
111
112
113
114
115
116
117 VDAC_4B
118 VDAC_VDD4
119 VDAC_4
120 VDAC_3B
TE
L 13942296513
121 VDAC_VDD3
122 VDAC_3
123 VDAC_2B
124 VDAC_VDD2
125 VDAC_2
126 VDAC_1B
127 VDAC_VDD1
128 VDAC_1
129 VDAC_0B
130 VDAC_VDD0
131 VDAC_0
132 VDAC_DVSS
133 VDAC_DVDD
134 VDAC_REFVDD
135 VDAC_REF
136 VDAC_REFVSS
137
138
139
140
141
142
www
143
144
145
.
146
147
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I/O
GND25 — Ground
O Byte read /write mask signal 3 output to HY57V283220T6
VDD25 — Power supply (+3.3V)
I/O Data bus to HY57V283220T6
GND25 — Ground
VDD25 — Power supply (+3.3V)
VCLK I/O Not used (open)
I/O Not used (open)
VS O S1 signal output
I/P SW O Progressive/interlace switch signal output
CDSEL O CD/ S/ PDEF data selection signal output
MREQ O Audio muting request signal output
VDDP — Power supply (+3.3V)
GNDP — Ground
MDI O Serial data output to PCM1609KPTR
MC O Serial data clock output to PCM1609KPTR
ML O Latch enable signal output to PCM1609KPTR
HIRQ2_ I Busy signal input from BR9040F
— Video DAC bias bit 4 (connected to the ground)
— Power supply (+3.3V)
O Video (CR/R) signal output
— Video DAC bias bit 3 (connected to the ground)
— Power supply (+3.3V)
O Video (CB/B) signal output
— Video DAC bias bit 2 (connected to the ground)
— Power supply (+3.3V)
O Video (Y/G) signal output
— Video DAC bias bit 1 (connected to the ground)
— Power supply (+3.3V)
O Video (Chrominance) signal output
— Video DAC bias bit 0 (connected to the ground)
— Power supply (+3.3V)
O Video (Composite) signal output
— Ground
— Power supply (+3.3V)
— Power supply (+3.3V)
I Reference voltage input (Video DAC)
— Ground (Video DAC)
XVSS — Ground
XOUT O Not used (open)
XIN I Clock (27MHz) signal input
XVDD — Power supply
AVSS2 — Ground
AVDD2 — Power supply (+3.3V)
AVDD1 — Power supply (+3.3V)
x ao
y
AVSS1 — Ground
VDD — Power supply (+1.8V)
i
GND — Ground
XCK O Audio system clock output to PCM1609KPTR
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