Aiwa CSD-A170 Service Manual page 17

IC DESCRIPTION
IC, LA9241ML
Pin No. Pin Name I/O
Pin to which external pickup photo diode is connected. RF signal is created by adding
1 FIN2 I
with the FIN1 pin signal. FE signal is created by subtracting from the FIN1 pin signal.
2 FIN1 I Pin to which external pickup photo diode is connected.
Pin to which external pickup photo diode is connected. TE signal is created by
3 E I
subtracting from the F pin signal.
4 F I Pin to which external pickup photo diode is connected.
5 TB I DC component of the TE signal is input.
Pin to which external resistor setting the TE signal gain is connected between the TE
6 TE- I
pin.
7 TE O TE signal output pin.
TES "Track Error Sense" comparator input pin. TE signal is passed through a band-
8 TESI I
pass filter then input.
9 SCI I Shock detection signal input pin.
10 TH I Tracking gain time constant setting pin.
11 TA O TA amplifier output pin.
Pin to which external tracking phase compensation constants are connected between
12 TD- I
the TD and VR pins.
13 TD I Tracking phase compensation setting pin.
14 JP I Tracking jump signal (kick pulse) amplitude setting pin.
15 TO O Tracking control signal output pin.
16 FD O Focusing control signal output pin.
Pin to which external focusing phase compensation constants are connected between
17 FD- I
the FD and FA pins.
Pin to which external focusing phase compensation constants are connected between
18 FA I
the FD– and FA– pins.
Pin to which external focusing phase compensation constants are connected between
19 FA- I
the FA and FE pins.
20 FE O FE signal output pin.
21 FE- I Pin to which external FE signal gain setting resistor is connected between the FE pin.
22 AGND — Analog signal GND.
23 SP O Signal ended output of the CV+and CV- pin input signal.
24 SPI I Spndle amp input.
25 SPG I Pin to which external spindle gain setting resistor in 12 cm mode is connected.
Pin to which external spindle phase compensation constants are connected together
26 SP- I
with SPD pin.
27 SPD O Spindle control signal output pin.
28 SLEQ I Pin to which external sled phase compensation constants are connected.
29 SLD O Sled control signal output pin.
30, 31 SL-, SL+ I Sled advance signal input pin from microprocessor.
32, 33 JP-, JP+ I Tracking jump signal input pin from DSP.
34 TGL I Tracking gain control signal input from DSP. Low gain when TGL = H.
35 TOFF I Tracking off control signal input pin from DSP. Off when TOFF = H.
Description
27
Pin No. Pin Name I/O
36 TES O Pin from which TES signal is output to DSP.
"High Frequency Level" is used to judge whether the main beam position is on top of
37 HFL O
bit or on top of mirror.
38 SLOF I Sled servo off control input pin.
39, 40 CV–, CV+ I CLV error signal input pin from DSP.
41 RFSM O RF output pin.
RF gain setting and EFM signal 3T compensation constant setting pin together with
42 RFS- I
RFSM pin.
"Slice Level Control" is the output pin which controls the RF signal data slice level by
43 SLC O
DSP.
44 SLI I Input pin which control the data slice level by the DSP.
45 DGND — Digital system GND.
46 FSC O Output pin to which external focus search smoothing capacitor is connected.
47 TBC I "Tracking Balance Control" EF balance variable range setting pin.
48 NC — No connection.
49 DEF O Disc defect detector output pin.
50 CLK I Reference clock input pin. 4.23 MHz of the DSP is input.
51 CL I Microprocessor command clock input pin.
52 DAT I Microprocessor command data input pin.
53 CE I Microprocessor command chip enable input pin.
54 DRF O "Detect RF" RF level detector output.
55 FSS I "Focus Search Select" focus search mode (± search/+ search) select pin.
56 VCC2 — Servo system and digital system Vcc pin.
57 REFI — Pin to which external bypass capacitor for reference voltage is connected.
58 VR O Reference voltage output pin.
59 LF2 I Disc defect detector time constant setting pin.
60 PH1 I Pin to which external capacitor for RF signal peak holding is connected.
61 BH1 I Pin to which external capacitor for RF signal bottom holding is connected.
62 LDD O APC circuit output pin.
63 LDS I APC circuit input pin.
64 VCC1 — RF system Vcc pin.
Description
28