Yamaha DSP-AX863SE Service Manual page 111

A B C
DIGITAL 5/5
1
2
4.8
2.5 2.5 2.4 2.4 2.4 2.4
0
IC86
0 0
0
3 4.8 4.8 0
0
0
0 4.8
0
VIDEO DECODER
4.8
2.5 2.5 2.5 2.5
2.5
2.4
0
IC87
0 0
0 4.8 4.8 0
0
0
4 0
4.8
0
5
0
0
1.0
0.8
0
0.3
0
0.3
0
0.3
0
0
3.4
0
0
0
3.4
6
0
0
0
0
0.4
0
0
0
0.4
0
0
0
3.3
3.2
3.3
3.3
7
0
0
0
0
5.0
0
0
5.0
0
0
OSD
0
0.4
0.7
0
-4.9
IC85
B-3
8
0.9 0.3
5.0 0.5
5.0 4.9
DSP-AX863 RX-V863/HTR-6180
9
IC84: ADV7172KSTZ
Digital PAL/NTSC video encoder
CSO_HSO VSO CLAMP ALSB
CLOCK PAL NTSC SCLOCK SDATA
HSYNC M
10 10
FIELD/ 2 YUV TO U 10-BIT
VIDEO TIMING I C MPU PORT L DAC A
VSYNC GENERATOR RBG DAC
T
MATRIX
BLANK 10 I 10
+ 10-BIT
YUV P DAC DAC B
RESET LEVEL L
E
CONTROL 10 10 10-BIT
TTX TELETEXT X DAC C
BLOCK DAC
TTXREQ INSERTION BLOCK E
10 R
V BRIGHTNESS AND LUMA
AA DAC V REF
CONTRAST CONTROL PROGRAMMABLE
10 CONTROL R
+ FILTER SET2
M BLOCK
8 Y 8 ADD SYNC + U COMP2
+ SHARPNESS
L
INTERPOLATOR FILTER 10
P0 T 10-BIT
4:2:2 TO YCrCb DAC DAC E
8 10 I
COLOR 4:4:4 TO U P
YUV SATURATION CONTROL 10
DATA INTER- MODULATOR L 10 10-BIT
POLATOR MATRIX 8 + PROGRAMMABLE 10 DAC F
+ E DAC
ADD BURST 10 CHROMA
P7 8 V + FILTER HUE X
8 CONTROL 10 10
INTERPOLATOR E 10-BIT
R DAC D
DAC
10 10
DAC
REAL-TIME SIN/COS
ADV7172/ADV7173 CONTROL CIRCUIT CONTROL R
DDS BLOCK SET1
BLOCK
COMP1
SCRESET/RTC GND
D E F
Page 116 K6
to VIDEO (1)_CB305
C-1
VIDEO DECODER
0
3.4
1.8
0
IC82
1.8
0
3.3
2.6
3.3
3.2
1.6 1.6 1.7
0
1.6
3.3
IC89
0.9 1.6 1.7
0.7
1.6
0.8
0.8
0.8
0
0
0
0
1.7
0
0
0
0
3.4
0
RX-V863 DSP-AX863SE RX-V863/HTR-6180 RX-V863
IC91-93: SN74LVTH245APW
IC86, 87: TC74VHCU04FT IC89: TC7WZ32FK (TE85L, F)
3.3 V ABT octal bus transceivers with 3-state outputs
Hex inverters
Dual 2-input OR gate
DIR 1 20 Vcc
1A VCC
1 14 1A 1 8 Vcc
A1 2 19 OE
1Y 2 13 6A 1B 2 7 1Y
A2 3 18 B1
2A 3 12 6Y 2Y 3 6 2B
GND 4 5 2A A3 4 17 B2
2Y 4 11 5A
A4 5 16 B3
3A 5 10 5Y
3Y 6 9 4A A5 6 15 B4
GND 7 8 4Y
A6 7 14 B5
A7 8 13 B6
A8 9 12 B7
GND 10 11 B8
G H I
Page 117 I9
to VIDEO (2)_CB356
IC94
1.3 0.7
VIDEO
1.5
1.3
3.3
1.3
3.2
0 ENCODER
3.3
3.3
IC84
3.3 3.3
0 0
3.3 3.3
3.3 3.3
0
3.3
0 0
3.3 0
2.6 3.3
3.3 3.3
3.3 0
1.8
3.3
0 0
SCALER
0
0
0 0
0
0
0 0
IC83
0 0
0 3.3
0 0
3.3
0
0 0
0
3.3
1.8 1.8
0
2.6
1.4 0
0
0.9
1.0 3.3
1.2 1.6
1.2 1.8
0
1.3
IC82: ADV7800BSTZ-80
10-bit, SDTV/HDTV 3D comb filter, video decoder and graphics digitizer
DDR/SDR-SDRAM INTERFACE
STANDARD DEFINITION PROCESSOR (SDP)
12 10 10
ANTIALIAS
CLAMP ADC DDR/SDR-SDRAM INTERFACE
FILTER
AIN1
TO 10 10
AIN12 ANTIALIAS 525p/625p MACROVISION STANDARD
CLAMP ADC 54
AUTODECTION PIXEL DATA
FILTER SUPPORT DETECTION
CVBS P0 TO P53
S-VIDEO
YPrPb ANTIALIAS 10 10
CLAMP ADC
SCART- AV CODE
(CBVS+RGB) FILTER 2D COMB VERTICAL
INSERTION
GRAPHICS RGB PEAKING
10 10
ANTIALIAS
CLAMP ADC
COLORSPACE
FILTER
HORIZONTAL CONVERSION CS/HS
FAST BLANK
3D COMB PEAKING
OVETLAY
CONTROL
FB
VS
CTI
TBC
LTI ITOP FIELD/DE
CVBS OUT DAC
24
P30 TO P53
CORE
HS_IN2 SFL/SYNC_OUT
DIGITAL INPUT PORT VBI DATA PROCESSOR (VDP)
VS_IN2 CLK
DVI OR HDMI
CLK_IN COMPONENT PROCESSOR (CP)
DE_IN
LLC
MACROVISION ACTIVE PEAK
SYNC PROCESSING AND
HS_IN DETECTION AND AGC
VS_IN CLOCK GENERATION
SOG
DIGITAL INT
SSPD STDI COLORSPACE GAIN OFFSET AV CODE
SOY
FINE
CONVERSION CONTROL CONTROL INSERTION
CLAMP
SCLK
SCLK2
SERIAL INTERFACE
SDA
CONTROL AND VBI DATA
SDA2
ALSB
J K L
IC85: LC74782JM-8A16-TLMC
Page 115 K8
The on-screen display controller LSI
to MAIN (2)_W109
9 Serial 8-bits
latch
11 parallel +
converter command
decoder
10
23
24
1
12
REGULATOR
8
4.7
Horizontal
3.3 character
size
3.3 4.7 Horizontal register
6 character
0 size
7
register
17
Horizontal Horizontal
character
character
18 size size
register register
19
20
22
4.9
IC80: R1172S331B-E2-F
1.8
1.8
3.3 CMOS-based positive-voltage regulator IC
4.9
0
4.9
0
1.8 0 V DD 6
REGULATOR
CE 3
IC94: R1172H181B-T1-F
Voltage regulator
3.3
V DD 4
3.3 5.0
3.3
3.3 5.0
0 0
CE 1
IC81: R1232D181A-TR-F
DC-DC converter
V DD
3
IC83: ABT1010PQ100A
V IN 2
High definition video scalar device
Current Limit
Slope Compensation
27MHz FIFO
L x 8
135MHz
Clock Generation 135MHz Q R
Video Timing
Video Out Clk DOMAIN Generator Output Control S
PWM Comparator
Oscillator
HD Scalar FIFO
TEST CKT
Video Input
1
Test Pattern
Generator PGND
CUE
Detection
Picture Controls
# All voltages are measured with a 10MΩ/V DC electronic voltmeter.
Blanking/
Borders # Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
Input Format
# Schematic diagram is subject to change without notice.
Decoder
601 to 709
709 to 601
4:2:2
Progressive
4:2:2 to 4:4:4
Video
24
30
YCbCr to RGB
12C Register File
Dither
27MHz
Bypass for Interlaced
DOMAIN
M N
RX-V863/HTR-6180/DSP-AX863SE/DSP-AX863
Horizontal Vertical Horizontal Vertical 31 inking Display RAM write
character character display display 3nd inversion control address
size position
size position control register counter
register register register register register
31 inking
Horizontal Vertical
size size Horizontal Vertical 3nd inversion Display RAM
dot counter
counter counter dot counter control
register
31 inking 31 inking
3nd inversion 3nd inversion
control control
register register
Decoder
Character Line VSS1 1 24 VDD1
control control
counter counter Xtal 2 23 RST
IN
Xtal 3 22 CTRL3
OUT
Font RAM CTAL1 4 21 CTRL2
BLANK 5 20 SEP IN
OSCIN 6 19 SEP OUT
Character output Shift
Synchronization OSC OUT 7 18 SEPC
Timing generator control register
signal generator Background control
CHARA 8 17 SYN IN
Video output control
CS 9 16 VDD1
SCLK 10 15 CV IN
SIN 11 14 NC
VDD2 12 13 CV OUT
21 4 2 3 5 15 13
1 V OUT
Pin No. Symbol Description
1 V OUT Output Pin of Voltage Regulator
2, 5 GND Ground Pin
3 CE Chip Enable Pin
4 NC No Connection
Vref
6 V Input Pin
DD
Current Limit
2,5 GND
5 V OUT
Pin No. Symbol Description
1 CE Chip Enable Pin
2 GND Ground Pin
3 NC No Connection
4 V DD Input Pin
Vref
5 V OUT Output Pin of Voltage Regulator
Current Limit
2 GND
POINT B-3 XL80 (Pin 3 of IC85)
1.6 0
2.6 1.7
2.6 3.3
2.6 3.3
2.6 3.3
2.6 3.3
2.6 3.3
2.6 3.3
0 3.3
3.3 0
2.6 0
2.6 3.3
3.3 2.6
POINT C-1 XL81 (Pin 81 of IC82)
3.3 3.3
0 3.1
0 3.3
0 3.3
0 1.4
0 1.3
0
3.3
0
0
2.6 3.3
0 3.3
0 3.2
2.6 3.2
2.6 3.3
2.6 3.3
2.6 3.3
0 3.3
0
3.3
BUS BUFFER
AGND
7
5 V OUT
Phase Compensation
Vref
Error Amplifier 4 CE
Soft Start
"H" Active
UVLO
Chip Enable
6
"L" Fixed
TEST
111