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7. CIRCUIT DIAGRAM
1
1
2
2
3
3
4
4
A
A
PMIC_VPWR_BYPASS
VDD_MSM : 0.1uF
VDD_MSMC : 4.7uF
VDD_ANA : 0.1uF
VDD_MSME : 4.7uF
B
B
VDD_RUIM : 0.1uF
VDD_PA
: 4.7uF
VDD_RF
: 0.1uF
VDD_WLAN : 0.1uF
VDD_MAIN : 0.1uF
+VPWR
VDD_SPKR :
NA
C
C
Artwork --> Place resistor and capacitor close to PM6650 !!
D
D
1
ADC_BYP
2
+5V_PWR
VCHG
3
ICHARGE
ISNS_P
4
CHG_CNT_N
CHG_CTL_N
5
C724
C725
ICHARGEOUT
ISNS_M
6
0.1u
VBATT
VBAT
1u
7
BATT_FET_N
BAT_FET_N
8
FLSH_DRV_N
9
C729
MSM_RESIN_N
PON_RESET_N
10
VREG_USB
11
1u
USB_ID
12
VREG_5V
13
USB_OE_N
USB_OE_N
14
VSW_5V
15
D701
USB_CTL_N
USB_CTL_N
16
E
E
USB_VBUS
USB_VBUS
17
USB_DAT
USB_DAT
RB521S-30
18
MSM_USB_D+
USB_D_P
19
USB_SE0
USB_SE0
20
MSM_USB_D-
USB_D_M
21
GP1_DRV_N(MPP7)
47K R710
1u
C732
Power Line --> Route carefully!!!!!
F
F
Draw the Artwork_line thickly !!!!!
--->> USB_VBUS , FLASH_DRV_N , KPD_DRV_N , KEY_ON_SW_N , MOT_PWR-
100K
R711
+VPWR
+VPWR
C
C
D
D
E
E
F
F
1
1
2
2
3
3
4
4
LG(42)-A-5505-10:01
LG(42)-A-5505-10:01
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
5
5
6
6
7
8
REMOTE_PWR_ON
1u
C715
0.1u
C723
63
REF_BYP
62
BAT700
R704
REF_GND
61
R705
ML414RM_F9CL
REF_ISET
60
1%
RB521S-30
121K
VCOIN
59
MSM_INT_N
PM_INT_N
58
TCXO_IN
TCXO_PM
D700
57
PS_HOLD
56
VREG_MSMA
4.7u C726
55
TCXO_EN
TCXO_EN
54
U700
VDD_ANA
+VPWR
R708
smd_1608h_9_r
53
PM6650-1M
TCXO_OUT
BUFF_TCXO
52
smd_1608h_9_r
+VPWR
51
VDD_MSM
C730
51
4.7u
SBST
PM_SBST
50
VREG_MSMP
49
SBCK
PM_SBCK
48
VBACKUP
47
SBDT
PM_SBDT
46
XTAL_OUT
45
SLEEP_CLK
SLEEP_CLK
44
XTAL_IN
43
RUIM_RST(MPP6)
USIM_P_RST_N
Load=12.5p
C733
C734
18p
18p
Route carefully to avoid corrupting sensitive analog and RF signals!!!!!
+VPWR
----->>
PM_SBDT , PM_SBCK , PM_SBST , PM_INT_N
L700
L701
4.7uH
4.7uH
ICHARGE
2012
Route as equal length as possible! -> ICHARGE, ICHARGEOUT
1%
ICHARGEOUT
+VPWR
VBATT
Battery charging circuit !!!!!
5
5
6
6
7
7
8
8
9
10
11
12
SDRAM_ADDR(0:12)
SDRAM_ADDR(0)
C3
A0
SDRAM_ADDR(1)
D3
A1
SDRAM_ADDR(2)
E3
A2
SDRAM_ADDR(3)
E2
A3
SDRAM_ADDR(4)
D12
A4
C12
SDRAM_ADDR(5)
A5
SDRAM_ADDR(6)
D11
A6
SDRAM_ADDR(7)
C11
A7
SDRAM_ADDR(8)
D10
A8
SDRAM_ADDR(9)
C10
A9
SDRAM_ADDR(10)
E4
A10
SDRAM_ADDR(11)
D9
A11
SDRAM_ADDR(12)
C9
A12
L6
RESOUT_EBI2_N
_WP
VREG_MSMP_2.7V
K6
EBI2_WE_N
_WEN
D5
SDRAM_RAS_N
_RAS
D6
SDRAM_WE_N
_WED
E6
SDRAM_CAS_N
_CAS
C8
SDRAM_CLK
CLK
E5
SDRAM_CS_N(0)
_CS
M3
NAND_ALE
ALE
M4
NAND_CLE
CLE
M9
NAND_CS_N
_CE
M10
EBI2_OE_N
_RE
M2
NAND_READY
RY__BY
D8
SDRAM_CLK_EN
CKE
VREG_MSME_1.8V
C4
SDRAM_ADDR(13)
BA0
D4
SDRAM_ADDR(14)
BA1
C7
VCCD1
D2
VCCD2
D13
VCCD3
V3
VCCD4
V8
VCCD5
V12
VCCD6
VREG_MSMP_2.7V
V4
VCCQD1
470K
V9
VCCQD2
K12
VCCN2
PS_HOLD
C6
VSS1
F7
JTAG_PS_HOLD
VSS2
G2
VREG_MSMA_2.6V
VSS3
G13
R707
0
VSS4
L13
VSS5
P2
VSS6
P13
VSS7
R8
VSS8
U2
VREG_MSMP_2.7V
VSS9
U6
R709
0
VSS10
U10
VSS11
U13
VSS12
D7
NC132
J12
NC131
K4
NC71
K5
NC72
K9
NC73
K10
NC74
K11
Artwork --> Place crystal and load caps close to PM6650 !!
NC75
K13
NC76
K14
NC77
L1
NC78
L2
NC79
L3
NC80
L4
NC81
L5
NC82
L9
NC83
L11
NC84
L14
NC85
M5
NC86
M6
NC87
M12
NC88
N2
NC89
USB_VBUS_IN
USB_VBUS
USB_VBUS
R730
NA
6
5
4
Q700
QST4
NA
1
2
3
USB_PWR_EN
USB_CTL_N
KRX102E
Q702
Q701
NUS5530MN
10
Drain_B
1
9
NC1
Collector_B
USB Booting Protection
2
8
Collector
Emitter
+5V_PWR
3
7
Source
Base
CHG_CNT_N
4
6
Drain
NC2
5
Gate
BATT_FET_N
9
9
- 197 -
13
14
15
16
SDRAM_DATA(0:31)
U4
SDRAM_DATA(0)
DQ0
T4
SDRAM_DATA(1)
DQ1
T5
SDRAM_DATA(2)
DQ2
V5
SDRAM_DATA(3)
DQ3
U5
SDRAM_DATA(4)
DQ4
T6
SDRAM_DATA(5)
DQ5
V6
SDRAM_DATA(6)
DQ6
U7
SDRAM_DATA(7)
DQ7
T9
SDRAM_DATA(8)
DQ8
T10
SDRAM_DATA(9)
DQ9
V10
SDRAM_DATA(10)
DQ10
T11
SDRAM_DATA(11)
DQ11
U11
SDRAM_DATA(12)
DQ12
V11
SDRAM_DATA(13)
DQ13
T12
SDRAM_DATA(14)
DQ14
U12
SDRAM_DATA(15)
DQ15
P3
SDRAM_DATA(16)
DQ16
R3
SDRAM_DATA(17)
DQ17
P4
SDRAM_DATA(18)
DQ18
R4
SDRAM_DATA(19)
DQ19
P5
SDRAM_DATA(20)
DQ20
R5
SDRAM_DATA(21)
DQ21
P6
SDRAM_DATA(22)
DQ22
R6
SDRAM_DATA(23)
DQ23
P9
SDRAM_DATA(24)
DQ24
P10
SDRAM_DATA(25)
DQ25
R10
SDRAM_DATA(26)
DQ26
P11
SDRAM_DATA(27)
DQ27
R11
SDRAM_DATA(28)
DQ28
P12
SDRAM_DATA(29)
DQ29
R12
SDRAM_DATA(30)
DQ30
R13
SDRAM_DATA(31)
DQ31
U8
DQM0
SDRAM_DQM(0)
T8
U701
DQM1
SDRAM_DQM(1)
V7
DQM2
SDRAM_DQM(2)
U9
TY90009800COGG
DQM3
SDRAM_DQM(3)
EBI2_DATA(0:7)
M11
EBI2_DATA(0)
EUSY0297301
IO1
M13
EBI2_DATA(1)
IO2
L10
EBI2_DATA(2)
IO3
L12
EBI2_DATA(3)
IO4
J9
EBI2_DATA(4)
IO5
H12
EBI2_DATA(5)
IO6
H10
EBI2_DATA(6)
IO7
G12
EBI2_DATA(7)
IO8
A1
NC1
A2
NC2
A3
NC3
A4
NC4
A11
NC5
A12
NC6
A13
NC7
A14
NC8
B1
NC9
B2
NC10
B3
NC11
B4
NC12
B11
NC13
B12
NC14
B13
NC15
B14
NC16
C1
NC17
C2
NC18
C5
NC19
C13
NC20
C14
NC21
D1
NC22
D14
NC23
E1
NC24
E7
NC25
E8
NC26
E9
NC27
E10
NC28
E11
NC29
Section
Section
Date
Date
Sign & Name
Sign & Name
MAY
MODEL
MODEL
JOY 1.3
Designer
Designer
LGE
LGE
2006
Checked
Checked
DRAWING
DRAWING
MODEM POWER
NAME
NAME
Approved
Approved
DRAWING
DRAWING
draw_number
draw_number
LG Electronics Inc.
LG Electronics Inc.
NO.
NO.
LG Electronics Inc.
LG Electronics Inc.
LGE Internal Use Only
A
B
C
D
E
F
C
C
D
D
E
E
Sheet/
Sheet/
Sheets
Sheets
7/7
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