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HP 27130A
System Clocks
Three synchronized system clocks (1.8432 MHz, 3.6864 MHz, and 7.3728 MHz), all derived from
the I 4.7456 MHz clock signal CCLK + (see A 21, 7
-1),
perform the following functions:
1.8432 MHZ (PHI_CTC): Provides input to the CLK/TRGpins on the CTCs to generate _ baud
rates and system timing intervals.
3.6864 MHz (PHI):
Used to provide a system clock to the Z-80B CPU, the SIOs and MIC,
and the CTCs.
7.3728 MHz (2_PHI):
Drives the MIC.
Memory Address Space
The Z-80B CPU address space of 64K bytes is divided into several sections as shown in figure 3-2.
The two memory sockets, U64 and U74, are reserved for EPROMs and/or static RAMs. Socket U64
can be configured for 4K, 8K, or 16K byte EPROMs. Socket U74 can be configured for 4K byte
EPROM, 8K byte EPROM, 2K byte static RAM, or 8K byte static RAM. Note, however, that when a
16K byte EPROM is installed in U64, socket U74 must be left empty to avoid bus contention.
The address space of U64 is from OH to 3FFFH when this socket is configured for the 16K byte
EPROM. The address space is from OH to IFFFH when the socket is configured for 4K or 8K byte
EPROMs.
The address space of U74 is fixed between 2000H to 3FFFH.
The following types of EPROMs can be installed in socket U64:
4K by 8 (Intel 2732)
8K by 8 (Intel 2764)
16K by 8 (Intel 27128)
The following types of EPROMs and static RAMs can be installed in socket U74:
4K by 8 EPROM (Intel 2732)
8K by 8 EPROM (Intel 2764)
2K by 8 static RAM (Hitachi HM-6116)
8K by 8 static RAM (HitachiHM-6164)
Memory Configuration jumper WI is used to configure the two memory sockets. WI contains
nine jumper positions: A,
B,
C,
D,
E,
F, G,
H, and
J.
Positions A through D configure socket U64;
positions E through H configure U74; and position
J
enables the WAIT- signal of the MIC to the
Z-80B
cpu.
The MIC always asserts the WAIT- signal when the lowest 16K byte address is ac-
cessed.
Position
J
should be closed (a jumper installed) when EPROMs/RAMs with access times
greater than 250 nsec are
us~d.
The jumper is shown in Section
II,
figure 2-2.
NOTE
The jumpers are set at the factory and need no further
adjustment unless the EPROMs or RAMS are changed.
3-3
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