Toshiba D-VR3SU Service Manual page 147

7-13 OSD
The on screen display circuit consist of a character generator decoder, video mixer, sync separator and sync gener-
ator, sync detector circuit.
The data is decoded and generates characters in syncro with composite video signal applied pin 49, 50.
Also the sync detector circuit discriminates the presence of a video signal by detecting sync, if no sync is detected,
a blue screen is displayed. In other word, the OSD circuit displays character on the video when there is a video
signal or on blue screen when there is no video signal. (No sync).
37
4/2 fsc
38
oscilator
49
CVin
Sync-tip
clamp
AFCC
52
57
AFCLPF
Sync signal
generator
Display data
readout
AFC
control
Control circuits
(display position.
blinking. etc.)
registers
IC601
Background
H
video signal
V
Blue Background
Super impose
Dot display
control
Character data
ROM
(128 characters)
On-screen display
RAM
Fig. 7-32 Block Diagram
Circuit Operating Descriptions
H/V
C-Sync Slice
seperation
47
CVout
50
CVin2
7-47