Block Diagram - Onkyo DV-SP302 Service Manual

IC BLOCK DIAGRAM/ TERMINAL DESCRIPTION
IC15 : WM8761 D/D Converter

BLOCK DIAGRAM

BCKIN IN
LRC RCIN IN
DIN IN
PIN DESCRIPTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MUTE TE
AUD UDIO IO
INTERFACE CE
MUTE TE
PIN CONFIGURATION
NAME TYPE
LRCIN Digital input
DIN Digital input
BCKIN Digital input
NC No connect
CAP Analogue output
VOUTR Analogue output
GND Supply
VDD Supply
VOUTL Analogue output
MUTE igital input
NC No connect
DEEMPH Digital input
FORMAT Digital input
MCLK Digital input
CONTROL OL
INTERFACE CE
SIGMA MA
DELTA TA
MODULATOR OR
DIGI GITAL F FILTERS RS
SIGMA MA
DELTA TA
MODULATOR OR
LRCIN LRCIN 1 14 14
DIN DIN 2 13 13
BCKIN BCKIN 3 12 12
WM8761 WM8761
NC NC 4 11 11
CAP CAP 5 10 10
VOUTR VOUTR 6 9
GND GND 7 8
DESCRIPTION
Sample rate clock input
Serial audio data input
Bit clock input
No internal connection
Analogue internal reference
Right channel DAC output
Negative supply
Positive supply
Left channel DAC output
Soft mute control, Internal pull down
High Impedance Automute
High = Mute ON
Low = Mute OFF
No internal connection
De-emphasis select, nternal pull up
High = de-emphasis ON
Low = de-emphasis OFF
Data input format select, Internal pull up
Low = 24-bit right justified or DSP 'late'
2
High = 16-24-bit I S or DSP 'early'
Master clock input
WM8761 61
LOW OW
DAC AC PA PASS SS
VOUTR TR
FILTER ER
LOW OW
DAC AC PASS PASS
VOUTL TL
FILTER ER
CAP AP
MCLK MCLK
FORMAT FORMAT
DEEMPH DEEMPH
NC NC
MUTE MUTE
VOUTL VOUTL
VDD VDD
DV-SP302