Open Architecture Controller - Motorola HT 1000 series Theory/Troubleshooting Manual

U705 pin 51, PE1. After passing through the 8-
bit digital attenuator, the audio goes to a buffer
amplifier and exits the module at U701 pin 21
(RX AUD OUT), where it is routed to audio PA
module U706 (pin 8).
b. Differential Speaker Audio Amplification
The final stage in the receive path is the audio
amplifiers that drive either the internal or exter-
nal speakers. Each speaker is driven using a
dual-amplifier arrangement. Since one amplifier
can be shared as common between the two
speakers, only three total amplifiers are needed
inside the audio PA IC, U706.The audio signal
is coupled into the amplifiers on U706 pin 8,
AUD IN.
There are two enable lines controlling the three
audio amplifies in module U706. They are the
internal enable (INT EN) line and the power
amplifier enable (PA EN) line. The INT EN input
at U706 pin 21, which is used to control the
phase of the internal or external amplifier,
comes from U701 pin 43. The PA EN input at
U706 pin 20, which enables all three amplifiers,
comes from U701 pin 44. The INT EN line is
active-low, while the PA EN line is active-high.
The microcomputer determines which speaker
that audio should be routed to (internal or exter-
nal) by reading option select lines 1 and 2 (OPT
SEL 1 and OPT SEL 2) at pins 1 and 5 of the
universal connector, P403. If the microcomputer
senses a vehicular adapter connected to the
radio (which is identified by having a diode from
OPT SEL 2 to OPT SEL 1, with the anode at
OPT SEL 2), and the radio is in receive mode,
the audio will be directed to the external speak-
er at P403 pins 2 and 6. The audio is set at a
fixed level, independent of the radio volume pot
setting. When the receive path is enabled, all
three amplifiers in U706 are turned on. If the
internal speaker amplifier is selected, then its
output is 180 degrees out of phase with that of
the common amplifier. The result at the internal
speaker is a signal twice as large as either
amplifier's output, while the external amplifier is
in phase with the common amplifier; the result
at the external speaker is no signal. The
reverse is true if the external speaker is select-
ed. The nominal voltage for rated audio is
3.74Vrms, and the nominal audio input to U706
is 88.7mVrms, when rated audio output is
obtained.
4. Receive Data Circuits
The ASF IC (U701) is used to decode all receive
data, which includes PL, DPL and MDC. The
decode process for each data type typically involves
low-pass or band-pass filtering, signal amplification,
and routing the signal to a comparator, which out-
puts a logic zero or a logic one signal. The
discriminator output from the transceiver board is
routed to U701 pin 15 through coupling capacitor
C710. Inside module U701, the data is filtered
according to the data type [high-speed (HS) data or
low-speed (LS) data], then hard-limited to a 0-5V
digital level. The high-speed data output (MDC)
appears at U701 pin 23, where it interconnects with
the microcomputer, U705 pin 11, PA0. The low-
speed limited data output (PL, DPL) appears at
U701 pin 48, where it interconnects with U705 pin
10, PA1. If, for example, the radio is receiving 192.8
Hz PL, the discriminator should contain a 192.8 Hz
sine wave at about 53 mVrms, and the limited PL
output should be a 192.8 Hz square wave. While
the radio is decoding PL, DPL, the microcomputer
also outputs a sampling waveform on U705 pin 6,
PA5, which is routed to U701 pin 40. The same line
used to generate transmit PL or DPL data. This
sampling waveform is a square wave between 1000
and 2000 Hz.
5. Alert Tone Circuits
When the microcomputer gives the operator feed-
back, radio status (low battery condition, circuit
failures, etc.), it sends an alert tone to the speaker.
It does so by sending data to ASF IC U701, which
sets up the audio path to the speaker for alert tones.
The alert tone itself can be generated in one of two
ways: internally by the ASFIC, or externally using
the microcomputer and the ASFIC. The allowable
internal alert tones are 300, 900, and 1800 Hz. For
external alert tones, the microcomputer can gener-
ate any tone within the 100-3000 Hz audio band.
This is accomplished by the microcomputer toggling
the output line U705 pin 5 (PA6) which is also the
same line used to generate low-group DTMF data.
Inside the ASF IC, the signal is routed to the exter-
nal input of the alert tone generator; the output of
the generator is summed into the audio chain after
the RX audio de-emphasis circuit. Inside module
U701, the tone is amplified, filtered, and passed
through the 8-bit digital volume attenuator. The tone
signal, from ASF IC U701 pin 21, is then routed to
the audio PA the same as receive audio.
VI. OPEN ARCHITECTURE CONTROLLER
The open architecture controller consists of:
• U705, a new generation Motorola microprocessor;
• U710, a custom gate array;
• U715, normally a 256k or 512k memory;
• U714, a 32K static RAM; and
• U713, an EEPROM which could be 8K or 32k.
All of these devices are powered by regulated 5
volts provided by voltage regulator U708. In addition to
21