Motorola HT 1000 series Theory/Troubleshooting Manual page 31

common symptom is the RESET line goes low peri-
odically, with the period being on the order of msec.
5. RAM
The on-chip 1k static RAM from U705 provides
some scratch-pad memory, with the bulk of it com-
ing from the external 32K SRAM U714. External
SRAM accesses are indicated by the CSGEN signal
U714 pin 20 (which comes from U705-PG6) going
low. Normally RAM is accessed less often than the
Flash U715; i.e., the number of transitions per sec-
ond on U715 chip select (pin 30) should be 5-15
times higher than those on U714 pin 20.
6. EEPROM
The so-called radio codeplug storage is provided by
U705's internal 512 byte EEPROM, with an addition-
al 8K or 32K bytes of data provided by external
EEPROM U713. There are three basic types of
codeplug information: information on the trunked
system(s) on which the radio is authorized to oper-
ate, information on the conventional system(s),
which is either of the repeater or talk-around type on
which the radio is authorized to operate, and infor-
mation on the configuration and tuning of the radio
itself. Note: tuning information is located in the inter-
nal memory of U705.
7. SB9600 Serial Interface
The radio uses a proprietary multiprocessor serial
protocol known as SB9600. This protocol allows the
microprocessor in the system to interface to an
external PC (for programming using RSS), a remote
hand-held mic, or a vehicular adapter.
From a hardware standpoint, this interface is com-
prised of the universal connector lines LH BUSY
and LH DATA (P403 pins 9 and 13, respectively).
The LH DATA signal is a bidirectional 0-5V RS-232
line that uses U705's integrated RS-232 asyn-
chronous serial communications interface (SCI)
peripheral, with the SCI TX line being U705-PD1
and the SCI RX line being U705-PD0. The SCI TX
line is connected to the controller board signal LH
DATA through Schottky diode CR702. This diode
allows the SCI TX line to drive LH DATA active low
only; when SCI TX is high, the diode does not con-
duct and LH DATA is pulled high by 10K resistor
R743. The LH DATA line is connected to U705's
SCI RX line through analog switch U709, which is
normally closed unless the radio is in the Flash pro-
gramming mode, as previously discussed. The LH
DATA signal is routed to the controller connector
J701 pin 26 via analog mux U711, which is normally
configured to select signals X0, Y0, and Z0 by virtue
of the common control signal MUX CNTL being a
logic low.
The LH BUSY signal, which is labelled BUSY on the
controller schematic, is connected to two digital
ports: U705 input PA1, and U710 output PL6. The
BUSY signal is a bidirectional active-high signal that
is normally pulled down by 10K resistor R739. It is
routed to the controller connector J701 pin 22, via
U711 pins 2 and 15.
A typical usage of the SB9600 interface is using a
PC running the RSS software package and the
radio interface box (RIB) to program the radio's
codeplug. When the PC sends a command or data
to the radio, one should observe the SCI RX line
(U705-PD0) toggling at a 9600 baud rate, and the
BUSY line going high when data is actually being
sent. After data transfers are completed, the BUSY
line should idle low and the LH DATA line should
idle high. The controller board also sends a power-
up status message when it is first turned on, so one
should be able to observe SB9600 data being sent
from the radio within a few msec after power-up.
8. SPI Interface
The microprocessor communicates to several ICs
and modules through a dedicated on-chip serial
peripheral-interface (SPI) port which consists of
transmit data line MOSI (U705-PD3), receive data
line MISO (U705-PD2), and clock line SCK (U705-
PD4). In addition, each IC that can be accessed by
the multiprocessor using the SPI has a select line
associated with it. The programmable ICs or circuits
and their associated select lines are:
• the ASFIC (U701), with select line U705-PG3,
• the transceiver board reference oscillator
(U203), with select line U705-PG1,
• the transceiver board synthesizer (U204), with
select line U705-PG0,
• the transceiver board IF IC (U3), with select line
U710-PL4,
• the transceiver board D/A with select line
U710-PD5,
• the LCD display board, with select line
U710-PK6, and
• the secure/data board, which has two indepen-
dent select lines, U710-PK5 and U710-PK0.
For all these SPI devices, the select lines are
active-low; i.e., the select line goes low only when
the associated device is being programmed. The
first five ICs are listen-only; i.e., they cannot output
data on the MISO line.
The LCD keypad/display board uses the master
out/slave in (MOSI) line to send data to the display
driver IC, and the master in/slave out (MISO) line to
send keypad data back to the controller multipro-
cessor. Note, however, that the keypad (or any
other SPI device) can never initiate display data; the
multiprocessor is at all times the SPI master device.
Thus the MOSI line, and the MISO line are always
in the master configuration. When a key is pressed,
logic in the keypad board causes the KEY INT line
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