Advanced Chipset T Setup - Pine Technology PT-429G User Manual

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Advanced Chipset Setup
5.7
AMIBIOS SETUP PROGRAM - ADVANCED CHIPSET SETUP
(C)1993
AUTO
Function
Cache
Read
Cache
Write
DRAM Type
DRAM Wait State(s) :
Keyboard Clock Select:
AT Clock Select
IO Recovery
Hold PD Bus
/I Refresh Cycle
Non-Cacheable Block2 Enable: Disable
illustrated and described below.
Values depending on CPU clock speed: l> Cache Read Option; 2> Cache Write Option; 3> refresh
Cycle; 4> DRM Type; 5> DRAM Wait State(s); 6> keyboard Clock Select; 7> AT Clock Select; 8> IO
Recovery Time. If Disabled is chosen, The User Selected Values for the above parameters will be used.
amount of memory that is being remapped depends on shadow RAM information. The Remapping is
possible only if system memory is not more than 8MB.
American Megatrends Inc., All Rights Reserved
Enabled
Memory Remapping
3-2-2-2
F Segment Shadow RAM
Option
2 W.S.
Option
E Segment Shadow RAM
2 W.S.
7.2
M H z
CCOO-CFFF Shadow RAM
Time
2-3 T
DCOO-DFFF Shadow RAM
Delay 1'
in T2
Refresh Divider
Data Location of Local Bus
4MB
Stretch OWS# Signal Option
Hardware Parity Check
OKB
Enabled
Into-486
Disabled
Into-486
Into-486
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
ISA Bus
None
Do Not
Disabled
D e f a u l t s / p

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