Philips LX9000R Service Manual page 106

Circuit Diagrams and PWB Layouts
1 2 3
DVIO BOARD
Interface + DAC
+3V3_dly +3V3_dly +3V3_dly
7500-A 7500-B 7500-C
A
74LVC04A 74LVC04A 74LVC04A
14 14 14
1 2 3 4 5 6 4500
CLK27M_CON
7 7 7
GND GND
GND
GND
B not used
4501
2505
100n
2501
C
2502
100n
2503
100n
2504
100n
100n
74LVT16244
GND
BUFENn_VID
D
BUFENn_AUD
YUV(0)
YUV(1)
YUV(2)
YUV(3)
YUV(4)
YUV(5)
YUV(6)
YUV(7)
E
F527
GND
ABCK
PCM1_NEW
ALRCK_NEW
GND
F F527
A: DC, 2 V/Div, 20ns/Div
G
H
YUV(7:0)
{ALRCK,ABCK,PCM1,AEMP1,AMCLKO}
+3V3_dly
I 7500-F
74LVC04A
14
13 12
7
GND GND
1 2 3
LX9000R
4 5 6
+3V3_dly +3V3_dly 3V3 +3V3_dly
7500-E 7500-D
74LVC04A 74LVC04A
5500
14 14
F501
11 10 9 8
100MHZ
7 7
GND
GND
GND
Clock delay
3502
F510
3503 47R
F508
3V3
47R 3504
F506
3505 47R
F504
47R
not used
GND GND GND GND
7505
7 18 31 42
3506
F519
4
VC
10
3507 47R
F520
15
1
EN1
21
48
47R 3508
EN2 F522
25 28
EN3
34
24
3509 47R
EN4 F524
39
45
47R
GND
47 2
1 1
46 3
44 5
43 6
not used
41 8
1 2
40 9
GND GND GND GND
38 11
37 12
3510 F516
36 13
1 3
35 14
47R
F529
33 16
32 17
30 19
3514 F559
1 4
29 20
27 22
F554 47R
26 23
F555 F558
Buffer 3515
47R
F556 F557
F529 3516
47R
A: DC, 1 V/Div, 20ns/Div
not used
RESETn
GND GND GND GND
ISPN
TXD
Shielding connection on mounting holes
Hole 3.6 mm
Hole 4.9mm
0003 0004 0005 0006
GND GND GND GND
4 5 6
7. EN 106
7 8 9
F567
PCM1
F509
F507
F505
F503
ABCK
1500
179161
1 2
F511
3 4
F513
5 6
F512
7 8
9 10
F514
11 12
F518
13 14
F515
15 16
F521
17 18
19 20
21 22
3V3
ABCK
23 24
F530 F531 1502 F532 F533
25 26
750mA F
27 28
F534
29 30 4502
not used
31 32 GND
F535
GND 33 34 ALRCK
35 36
37 38
not used
F523 F528 1503 F537
39 40
+5V
F562 750mA F
41 42
+12V
F550
43 44 4503
45 46
F538 F539
47 48
CTSN
49 50
F547
51 52
RXD
53 54
55 56
F549
57 58
59 60
To digital PCB
0007
GND
GND
7 8 9
10 11 12 13
not used
4507
3V3 3V3_32KHz 3V3_32KHz
5505 2527
100n
F563
GND
7507-A 7507-B
74LV74 14 74LV74 14
F564
4 5 10 9
F565 F566
3 11
2 12
1 6 13 8
7 7
3V3_32KHz
GND GND
2528
100n
7508
74LVC1GU04
5 GND
2 1 4
3
GND
3V3 3V3
DAC
2506 2507
47u 47u
2508 2512
3V3_LINK 100n 100n
2534
GND GND
7506
100n
UDA1334ATS 13 4
F551 VDDA VDDD
7501 1 BCK
74LVC1GU04
5
F552
2 4 2 WS DIGITAL PLL0 10
1
PLL
INTERFACE
F536
3 DATAI
3
PCM1_NEW
SFOR0 11
DE-EMPHASIS
SFOR1 7
GND 6 SYSCLK|PLL1
not used
INTERPOLATION FILTER
GND
F561
4504 8 MUTE
A_MUTE
NOISE SHAPER
F560
9 DEEM|CLKO
AEMP1
2514 2522
F553 F540
3517
14 VOL VOR 16
100R 47u F545 F544 47u
VSSA VSSD VREF-DAC
15 5 12 F548
GND GND GND GND
GND
F552
F551 F536
A: DC, 1 V/Div, 200ns/Div A: DC, 1 V/Div, 5us/Div
A: DC, 1 V/Div, 5us/Div
10 11 12 13
14
0003 I4 F542 G14
0004 I5 F543 G14
0005 I5 F544 G13
0006 I6 F545 G11
0007 I7 F547 G9
1500 C7 F548 G13
1501 H14 F549 H7
1502 E9 F550 G7
1503 F9 F551 F11
1906 I8 F552 F11
1907 I9 F553 G10
1908 I9 F554 E5
1909 I9 F555 F5
2500 A6 F556 F5
A
2501 C3 F557 F6
2502 C3 F558 F6
2503 C3 F559 E6
2504 C3 F560 G10
2505 C3 F561 F11
2506 E12 F562 F7
2507 E12 F563 A10
2508 E12 F564 B12
2509 C5 F565 B10
2510 C6 F566 B12
2511 C6 F567 A10
2512 E12
PCM1_NEW
2513 E7
B
2514 G11
2515 C6
2516 D5
2517 D6
2518 D6
2519 D6
2520 F9
2521 F9
2522 G13
2523 G10
2524 G14
2525 H12
2526 H13
C 2527 A11
2528 C12
2529 F9
2530 F5
2531 F5
2532 F6
2533 F6
2534 E10
3500 B5
3501 B3
3502 B5
3503 B5
3504 C5
3505 C5
D
3506 D5
3507 D5
3508 D5
3509 D5
3510 E5
3511 B3
3512 B2
3514 E5
3515 F5
3516 F5
3517 G10
3518 G13
3519 G11
E 3520 G13
4500 A3
4501 B2
4502 F9
4503 G9
4504 G10
4507 A12
5500 A5
5501 C4
5503 E12
5504 E12
5505 A10
7500-A A1
7500-B A2
F
7500-C A2
7500-D A4
7500-E A3
7500-F I1
7501 F10
7505 D4
7506 E11
7507-A B11
7507-B B13
7508 C11
F501 A5
F502 A3
F541 F542
3518
1 F503 C7
G
F504 C5
F543
100R
2 F505 C7
F506 C5
3 F507 B7
F508 B5
4
F509 B7
F510 B5
F511 D7
PH-S
GND GND GND
F512 D7
1501
F513 D7
F514 D7
F515 E7
F516 E6
F517 F10
H
F518 D7
F519 D5
F520 D5
F521 E7
F522 D5
F523 F8
F524 D5
F525 E12
F526 E12
F527 E3
F528 F8
F529 E5
F530 E7
I F531 E7
F532 E9
F533 E9
F534 F7
F535 F7
F536 F11
F537 F9
F538 G7
F539 G9
F540 G11
F541 G13
TR03017_002
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