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LC32D44E/S/RU-BK/GY (1st Eddition)
•
HDCP Built in Self Test (BIST) lowers cost to test HDCP operation.
•
Pre-programmed HDCP keys provide highest level of key security, simplifies manufacturing.
Pin No.
Digital Video Output Pins.
144, 143, 142, 141, 140, 137, 136, 133, 132, 131,
130, 129, 126, 125, 124, 123, 119, 118, 117, 116,
113, 112, 111, 110
1
2
3
121
Digital Audio Output Pins.
97
96
88
86
85
84
78
77
Configuration/Programming Pins.
104
102
32
31
30
29
28
27
103
107
34
33
101
56
6, 7, 8, 10, 11, 12, 13, 14, 17, 18, 19, 20, 81, 82,
83, 87, 93, 100
9
Differential Signal Data Pins.
40
39
44
43
48
47
52
51
59
58
63
62
67
66
71
70
Power and Ground Pins.
22, 23, 35, 74, 79, 92, 105, 114, 128, 139
21, 24, 36, 73, 80, 91, 106, 115, 127, 138
5, 16, 26, 76, 89, 109, 122, 134
4, 15, 25, 75, 90, 108, 120, 135
38, 42, 46, 50, 57, 61, 65, 69
41, 45, 49, 53, 60, 64, 68, 72
37
55
Pin Name
I/O
Q0-23
O
24-bit Output Pixel Data Bus.
DE
O
Data enable.
HSYNC
O
Horizontal Sync Output control signal.
VSYNC
O
Vertical Sync Output control signal.
ODCK
O
Output Data Clock.
XTALIN
I
Crystal Clock Input.
XTALOUT
O
Crystal Clock Output.
MCLKOUT
O
Audio Master Clock Output.
SCK
O
I2S Serial Clock Output.
WS
O
I2S Word Select Output.
SD0
O
I2S Serial Data Output.
SPDIF
O
S/PDIF Audio Output.
MUTEOUT
O
Mute Audio Output.
INT
O
Interrupt Output.
RESET#
I
Reset Pin. Active LOW. 5V Tolerant.
DSCL0
I
DDCI2C Clock for Port 0. 5V Tolerant.
DSDA0
I/O
DDCI2C Data for Port 0. 5V Tolerant.
DSCL0
I
DDCI2C Clock for Port 1. 5V Tolerant.
DSDA1
I/O
DDCI2C Data for Port 1. 5V Tolerant.
CSCL
I
Configuration I2C Clock. 5V Tolerant.
CSDA
I/O
Configuration I2C Data. 5V Tolerant.
SCDT
O
Indicates active video at HDMI input port.
CLK48B
I/O
Data Bus Latch Enable.
R0PWR5V
I
Port 0 Transmitter Detect. 5V Tolerant.
R1PWR5V
I
Port 1 Transmitter Detect. 5V Tolerant.
RSVDL
I
Reserved, must be tied LOW.
RSVD_A
Reserved Pin, leave unconnected.
NC
---
No internal connection.
Indicates. Even or Odd field for interlaced formats. Polarity pro-
EVNODD
O
grammable in register.
R0XC+
I
HDMI Port 0. TMDS input clock pair.
R0XC-
I
R0X0+
I
HDMI Port 0. TMDS input data pair.
R0X0-
I
R0X1+
I
HDMI Port 0. TMDS input data pair.
R0X1-
I
R0X2+
I
HDMI Port 0. TMDS input data pair.
R0X2-
I
R1XC+
I
HDMI Port 1. TMDS input clock pair.
R1XC-
I
R1X0+
I
HDMI Port 1. TMDS input data pair.
R1X0-
I
R1X1+
I
HDMI Port 1. TMDS input data pair.
R1X1-
I
R1X2+
I
HDMI Port 1. TMDS input data pair.
R1X2-
I
CVCC18
---
Digital Logic VCC.
CGND
---
Digital Logic GND.
IOVCC
---
Input/Output Pin Supply(3.3V).
IOGND
---
Input/Output Pin Ground.
AVCC
---
TMDS Analog VCC.
AGND
---
TMDS Analog GND.
PVCC0
---
TMDS Port 0 PLL VCC.
PVCC1
---
TMDS Port 1 PLL VCC.
5 – 5
Pin Function
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