Sony SPP-A973 Service Manual page 32

• IC Block Diagrams
U1 SN74HC595ADBR (BASE KEY board)
16 15 14 13 12 11
VCC
SHIFT REGISTER
LATCH
2 3 4 5 6 7
1
PARALLEL DATA
OUTPUT
U1006, 4002 CAT93C86S-LE10
1
CS
INSTRUCTION
2
SK DECODER, CONTROL
LOGIC AND CLOCK
INSTRUCTION
GENERATORS
DI 3
REGISTER
ADDRESS
REGISTER
HIGH VOLTAGE
GENERATOR
AND
PROGRAM
DECODER
EEPROM ARRAY 16384 BIT
TIMER
IOF 1024
& (1024X16) or (2048X8)
(or 2048)
READ WRITE AMPS
DATA IN/OUT RESISTER
16 (or 8) BITS
DATA OUT
DO 4
BUFFER
U2 PQ1R28
VC 1 6 VIN
GND 2 5 GND
CONTROLLER
NR 3 4 VO
10 9
GND
8
U4004 MC34119M
8 7 6
8 VCC
7 NC
BIAS
6 ORG CIRCUIT
1 2 3 4
5 VSS
– 45 –
U1 PCD6002 (I-TAD board)
PSEN 1
2
EAN
VPP 3
MA0 4
MA1 5
MA2 6
MA3 7
MA4 8
MA5 9
MA6 10
MA7 11
MAIN
AND
AUX RAM
WATCHDOG
VDD3V2 12
VSS3V1 13
P1.0/EX2 14
P1.1/EX3 15
16
P1.2/EX4
P1.3/EX5 17
P1
P1.4/EX6 18
P1.5 19
P1.6/SCL 20
21
P1.7/SDA
VSS3V 22
SPKRP 23
SPKRM 24
5
ANALOG VOLTAGE
REFERENCE
AND SUPPLY
+
25 26 27 28 29 30
_
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
32KBYTE OTP
MAIN BUS
P4
P2 P0
MCB
IOM
DCI
P3
MICROCONTROLLER
80C51
(DIGITAL)
µC-CLK
EVENTS
DMI MSK
TICB
IDLE
DSP
PLUS WAKE-UP
ROM,
DSPCLK
RAM
OSCILLATOR
CLK
AND
PLL
2
I C CODEC2 CODEC1
(DIGITAL) (DIGITAL)
RSTANA
(ANALOG)
GENERAL POR
CODEC2 CODEC1
PURPOSE AND DTMF
(ANALOG) (ANALOG)
A/D AND DA WAKE-UP BLOCK
31 32 33 34 35 36 37 38 39 40
– 46 –
64 WRN
60 RCN
62
P4.3
61 VSS3V2
60
P4.5/GPC
59 P4.4/FSI
58 P4.2/FSD
57 P4.1/FSK
56 P4.0/LE
55 RSTN
54 TST
53
VDD3V1
52 P3.7/MIN/DI
51 P3.6/MOUT2/FSC
50
P3.5/T1
49 P3.4/T0
48 P3.3/EXIN
47 P3.2/EXON
46 P3.1/MOUT1/DCK
45 P3.0/MOUT0/D0
44 VDD3V3
43 VDDPLL
42 XTAL1
41 XTAL2