Introduction; Hardware Requirements - Chelsio Communications Chelsio T5 Installation And User Manual

Chapter VIII. iSCSI PDU Offload Initiator

1. Introduction

The Chelsio T5/T4 series Adapters support iSCSI acceleration and iSCSI Direct Data
Placement (DDP) where the hardware handles the expensive byte touching operations, such as
CRC computation and verification, and direct DMA to the final host memory destination:
iSCSI PDU digest generation and verification
On transmit -side, Chelsio hardware computes and inserts the Header and Data digest into
the PDUs. On receive-side, Chelsio hardware computes and verifies the Header and Data
digest of the PDUs.
Direct Data Placement (DDP)
Chelsio hardware can directly place the iSCSI Data-In or Data-Out PDU's payload into pre-
posted final destination host-memory buffers based on the Initiator Task Tag (ITT) in Data-In
or Target Task Tag (TTT) in Data-Out PDUs.
PDU Transmit and Recovery
On transmit-side, Chelsio hardware accepts the complete PDU (header + data) from the
host driver, computes and inserts the digests, decomposes the PDU into multiple TCP
segments if necessary, and transmit all the TCP segments onto the wire. It handles TCP
retransmission if needed.
On receive-side, Chelsio hardware recovers the iSCSI PDU by reassembling TCP
segments, separating the header and data, calculating and verifying the digests, then
forwarding the header to the host. The payload data, if possible, will be directly placed into
the pre-posted host DDP buffer. Otherwise, the data will be sent to the host too.
The cxgb4i driver interfaces with open-iSCSI initiator and provides the iSCSI acceleration
through Chelsio hardware wherever applicable.
1.1.

Hardware Requirements

1.1.1. Supported Adapters
The following are the currently shipping Chelsio Adapters that are compatible with iSCSI PDU
Offload Initiator Software:
T502-BT
T580-CR
T520-LL-CR
T520-CR
T522-CR
T580-LP-CR
T540-CR
Chelsio T5/T4 Unified Wire For Linux
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