BIOS Setup Utility
CHIPSET FEATURES SETUP
CHIPSET
FEATURES
Memory Hole
System BIOS
Cacheable
Video RAM
Cacheable
Setting
Description
Disabled
15M-16M Some interface cards will map
their ROM address to this area. If
this occurs, select [15M-16M] in
this field.
Disabled
Enabled
The ROM area F0000H-FFFFFH
is cacheable.
Disabled
When synchronous DRAM is
installed, the number of clock
Enabled
cycles of CAS latency depends on
the DRAM timing. Do not reset
this field from the default value
specified by the system designer
SY-K7V DRAGON
67
Note
Default
Default
Default