Frequency Synthesizer Unit; Vco/Pll; Pll Unit Block Diagram - Kenwood TK-768 Service Manual

TK_768/H
4. Frequency Synthesizer Unit
4-1. VCO/PLL
The PLL generates the transmit signal and the first
localoscillator receive signal. The RF signalgenerated
by 05 (TX) or 02 (RX) in the VCO unit is amplified by
03, and the resulting signal is output to the TX-RX unit.
TX and RX 05 and 02 are switched by turning the
source line for Q5 and 02 on and off. This is done by
04 and 01 using the control signal (STR)generated
by
the serial-to-parallel
converter in the TX-RX unit. The
RF signal passes through 03 of the VCO unit and am-
plifier 0209 of the TX-RX unit, and is input to 1C202
(PLL lC). The 12.8MHz PLL reference signal generated
by the VCXO (X1) in the TX-RX unit is also input to
tc202.
Both signals are divided according to the division
data from the control unit to produce a 12.5kïz signal.
The phases are compared, and a phase difference sig-
nal is output and passes through the charge pump (in
lc202l and the low-pass filter of the lug lead to produce
the control voltage for A5lQ2 (VCO). This voltage is
applied to D3 and D4 (l'X) or D1 and D2 (RX) in the VCO
unit to keep the VCO frequency constant. The other
output from 03 is amplified by the RF ampliÍier (O1B),
and output to the transmit or receive unit via the RF
switch (D17).
tc202 PLL tc
CIRGUIT DESGRIPTION/
Éffiiff, HN
{
{
4. ffi+ÊFlËF+zc,
4-1. Is;Effi!ÊËË ( v c o )/fi1ffis ( PLL )
É tritH4 ( PLL) F +.È.ffi lrà+fi &'|!H Ê!H -flÉ
.íÈë, ÈEïàffiffi# (vco) +ÍÊt Q5 (Êff ) 4 Q2
(&'lÍ ) Peffiffffi,íÈ€& Q3 ilt,
&trtÊ!'ÍË€ffi^
f!+iEfrxmweÈ.fit (Q5) fi&& (Q2) . &rx-nx
F Í+ Y 1# 11- *' f r A & { *f + . - + ï à ftt|íÈ ' €
( srR) , iÉjd Q4 Ítr Qr Ëft||Êff ( Q5 ) ffl&rl! ( Q2 )
Ê!Ê&" f'Jm'ÍÈ'€iÉi$
vco +/EÉt Q3 fil rx-Rx tsÍ
Êt Q209 ilt+*ili\E)t^1C202 (PLLIc) " É TX-RX
+Í+P! vcxo (EÊffi{tffiík#> PHffJ 12.8MHz
Ê!
trfErli (PLL) ewffiÈÊ+tffi^llj
rc202.
m ,| ffi ^ Ê € & ffi rà ft tJ F,ín h ft .w ft fifrbY il frrl frT-'
,|ffi , frÈ.h lz.sY'tiz Ê!'ÍÈ€, f*tr m+'ÍÈ€it6fH {n
tL+L ffiSfEffiÊ.ÈE, itH'ÍÈË{Ë€iÉi$Èíf
F (ê
rc202+ ) EFiÉiÍêË1,íftiÉffi1É{#,
È4,-+#ftl| vco
(Q5/Q2) fïÉE{È€, r}tÊ,E'ÍË'€rJrS!J
vco +-ÍFtr!
D3 Í[ D4 (Eht> 4 Dl f[ D2 (ï*'& ) -t, u,íRl+ vco
ffiFWf,áË. Q3 Ê! fr - r#ffi S,ÍË€ É ftffi ,It *Ë
( Q r 8 )
teÍl
tl Po
0 1 8
D l 7
r - :
l*rx
l*nx
PLL DATA
cK (clocKl
DT (DATA}
EP (ENABLE)
{
40
Flg. 5 PLL unit block diagram