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EPOX P55-TH User Manual

82430hx isa pciset
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82430HX PCIset
P55-TH
ISA PCI
with Onboard PCI IDE and Super Multi-I/O.
TRADEMARK
All products and company names are
trademarks or registered trademarks of
their respective holders.
The specification is subject to change without notice.
M o th e rB o a rd

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Summary of Contents for EPOX P55-TH

  • Page 1 82430HX PCIset P55-TH ISA PCI M o th e rB o a rd with Onboard PCI IDE and Super Multi-I/O. TRADEMARK All products and company names are trademarks or registered trademarks of their respective holders. The specification is subject to change without notice.

  • Page 2: Table Of Contents

    Contents page Chapter 1 - Introduction ..........1-1 P55-TH Board Layout ..............1-2 Chapter 2 - Hardware Design ......... 2-1 Motherboard Layout .............2-1 Connectors and Jumpers ............2-2 System Memory configuration ..........2-4 Cache Memory configuration ..........2-6 Integrated PCI Bridge ............2-8 Chapter 3 - Award BIOS ..........3-1 Standard CMOS Setup ............3-2...

  • Page 3: Chapter 1 - Introduction

    Support four 16 bits ISA slots, four 32 bits PCI slots, and provides two independent high performance PCI IDE interface capable of supporting PIO Mode 3 and Mode 4 devices. The P55-TH supports four PCI Bus Masters and a jumperless PCI INT# control scheme which reduces configuration confusion when plug in PCI I/O controller card(s).
  • Page 4 1-2 P55-TH P55-TH Layout Keyboard BIOS CONN. JP15 Power Conn. J13 J14 39 40 BANK0 BANK1 JP8 JP6 +12V CPU FAN. TB-LED J2 J3 JP14 +J44 JP12 KEYLOCK SPKR. RESET G-LED SLEEP Figure 1-1...

  • Page 5: Chapter 2 - Hardware Design

    The P55-TH supports Onboard two PCI IDE connectors, and detects IDE harddisk type by BIOS utility automatic. The P55-TH supports Award Plug & Play BIOS for the ISA and PCI cards. The BIOS can be located in Flash EPROM. The advantage of having Flash EPROM is...

  • Page 6: Connectors And Jumpers

    P55-TH 2-2 Connectors and Jumpers This section describes all of the connectors and jumpers equipped in the motherboard. Please refer to Figure 1-1 for actual location of each connector and jumper. KeyLock - Keyboard lock switch & Power LED connector.
  • Page 7 Hardware Design JP14 Sleep/Resume switch : Close to enter sleep mode. A keystrobe or mouse movement (the mouse driver exists). The systemwill instantly "wake up". Onboard SMC's chip select : Open: Normal operation.(Default) Close: Disable the Onboard SMC chip. 1 2 3 JP15 Keyboard Operation Clock Select : 1-2 The clock rate is depend on the system AT...

  • Page 8: System Memory Configuration

    Cyrix CPU overheat problem. 2-3 System Memory Configuration The P55-TH supports different type of settings for the system memory. There is no jumper nor connector needed for memory configuration. Following figures provides all possible memory cominations.
  • Page 9 16M x 32 (64MB)-D 16M x 32 (64MB)-D 512MB NOTE : 1. P55-TH support both Fast Page DRAM or EDO DRAM SIMMs, but they cannot be mixed within the same memory bank. 2. SIMMs may be parrity (x 72) or non parity (x 64) or ECC(x 72).

  • Page 10: Cache Memory Configuration

    2-4 Cache Memory Configuration The second level (L2) of cache is installed in the motherboard to increase the system performance. The P55-TH supports different type of combinations for the cache installation. The COASt 2.0 or later Version(Cache-On-A-STick. The cache modules has a TAG SRAM.) solution provides Onboard flexibility, allowing Onboard and modules to accommodate 256KB/512KB piplined burst synchronous SRAM.
  • Page 11 32K*32 TAG SRAM Figure 2-1 COAST MODULE Your P55-TH may have come with an optinal COAST Module(Ref. Figure 2-1) to extend the cache size from 256KB to 512KB (When your P55-TH had mounted 256 KB (32K*32x2 synchronous SRAM)). Note : When you have a cache module to plug into a 160 pin daul readout connector.

  • Page 12: Integrated Pci Bridge

    There are four interrupts in each PCI slot : INTA#, INTB#, INTC#, and INTD#. Since the P55-TH adapts the PCI auto-configuration with the system BIOS Setup utility. When the system is turned on after adding a PCI add-in card, the BIOS automatically configure interrupts, DMA channels, I/O space, and other paramaters.

  • Page 13: Award Bios Setup

    AWARD BIOS 3-1 CHAPTER 3 AWARD BIOS SETUP Award's ROM BIOS provides a built-in Setup program which allows user modify the basic system configuration and hardware parameters. The modified data will be stored in a battery-backed CMOS RAM so data will be retained even when the power is turned off.

  • Page 14: Standard Cmos Setup

    This menu shows all of the manufacturer's default values of P55-TH. Again, user can move the cursor by pressing direction keys and <PgDn> or <PgUp> keys to modify the parameters.
  • Page 15 AWARD BIOS 3-3 ROM PCI/ISA BIOS BIOS FEATURES SETUP AWARD SOFTWARE, INC. Virus Warning : Disabled Video BIOS Shadow : Enabled CPU Internal Cache : Enabled C8000-CBFFF Shadow : Disabled External Cache : Enabled CC000-CFFFF Shadow : Disabled Quick Power On Self Test : Enabled D0000-D3FFF Shadow...
  • Page 16 3-4 CHAPTER 3 Quick Power On Self Test:This category speeds up Power On Self Test (POST) after you power on the computer. If it is set to Enable, BIOS will shorten or skip some check items during POST. Enabled : Enable quick POST. Disabled: Normal POST.
  • Page 17 AWARD BIOS 3-5 Typematic Rate Setting This determines the typematic rate. Enabled Enable typematic rate and typematic delay programming. Disabled Disable typematic rate and typematic delay programming. The system BIOS will use default value of this 2 items and the default is controlled by keyboard.

  • Page 18: Chipset Features Setup

    3-6 CHAPTER 3 C8000 - CBFFF Shadow : CC000 - CFFFF Shadow: D0000 - D3FFF Shadow: D4000 - D7FFF Shadow: D8000 - DBFFF Shadow: DC000 - DFFFF Shadow: These categories determine whether optional ROM will be copied to RAM by 16K byte or 32K byte per/unit and the size depends on chipset.
  • Page 19 AWARD BIOS 3-7 DRAM Timing: The default value is 70ns. 60ns : 2 (faster) Burst Wait State, for 60~70ns Fast Page Mode/EDO DRAM. 70ns : 3 (slower) Burst Wait State, for 70ns Fast Page Mode/EDO DRAM. : The default value is Enabled. Video BIOS Cacheable Enabled : This field Enabled the Video BIOS Cacheable to speed up the VGA Performance.

  • Page 20: Power Management Setup

    3-8 CHAPTER 3 3-4 POWER MANAGEMENT SETUP Choose the "POWER MANAGEMENT SETUP" in the CMOS SETUP UTILITY to display the following screen. This menu allows user to modify the power management parameters and IRQ signals. In general, these parameters should not be changed unless it's absolutely necessary. ROM PCI/ISA BIOS POWER MANAGEMENT SETUP AWARD SOFTWARE, INC.
  • Page 21 Valid range is from 1 minute up to 1 hour. 3-4-2 Description of the Green Functions The P55-TH supports HDD Power Down, Doze and standby power saving functions when Intel Pentium Processor is installed. In addition, the suspend function is supported when the JP14 (sleep ref.

  • Page 22: Pnp/Pci Configuration Setup

    3-10 CHAPTER 3 PM Events: AWARD BIOS defines 15 PM Events in the power management mode (Doze, standby & suspend). The user can initial any PM Events to be "Enable" or "Disable". When the system detects all of the enabled events do not have any activity, it will start the system Doze timer first if the "Power Management"...
  • Page 23 AWARD BIOS 3-11 Resource Controlled By:The default value is Manual. Manual:The field defines that the PNP Card's resource controlled by manual. You can set which IRQ-X and DMA-X assigned to PCI/ISA PNP or Legacy ISA Cards. Auto: If your ISA card or PCI card are all PNP cards. To set this field Auto. The bios will be assigned the resource automatically.

  • Page 24: Integated Peripherals

    3-12 CHAPTER 3 INTEGATED PERIPHERALS ROM PCI/ISA BIOS INTEGRATED PERIPHERALS WARD SOFTWARE, INC. IDE HDD Block Mode : Enabled PCI Slot IDE 2nd Channel : Enabled Onboard Primary PCI IDE : Enabled Onboard Secondary PCI IDE : Enabled IDE Primary Master PIO : Auto IDE Primary Slave PIO : Auto...
  • Page 25 AWARD BIOS 3-13 IDE Primary Master PIO: The default value is Auto. Auto : BIOS will automatically detect the Onboard Primary Master PCI IDE HDD Accessing mode. Mode0~4 : Manually set the IDE Accessing mode. IDE Primary Slave PIO: The default value is Auto. Auto : BIOS will automatically detect the Onboard Primary Slave PCI IDE HDD Accessing mode.

  • Page 26: Load Setup Defaults

    3-14 CHAPTER 3 Onboard UART 2 Mode:The default value is standard. This fields allow the User to select the COM2 port that can supports a serial Infrared Interface. standard:Support a Serial Infrared Interface IrDA. HPSIR:Support a HP Serial Infrared Interface formats. ASKIR:Support a Sharp Serial Infrared Interface formats.

  • Page 27: Change Supervisor Or User Password

    AWARD BIOS 3-15 ROM PCI/ISA BIOS CMOS SETUP UTILITY AWARD SOFTWARE, INC. STANDARD CMOS SETUP SUPERVISOR PASSWORD BIOS FEATURES SETUP USER PASSWORD CHIPSET FEATURES SETUP IDE HDD AUTO DETECTION POWER MANAGEMENT SETUP HDD LOW LEVEL FORMAT PNP/PCI CONFIGURA ETUP Load SETUP Default (Y/N)? INTEGRATED PERIPH SAVING LOAD SETUP DEFAULTS...

  • Page 28: Ide Hdd Auto Detection

    3-16 CHAPTER 3 3-9 IDE HDD AUTO DETECTION The "IDE HDD AUTO DETECTION" utility is a very useful tool especially when you do not know which kind of hard disk type you are using. You can use this utility to detect the correct disk type installed in the system automatically.
  • Page 29 AWARD BIOS 3-17 LBA (Logical Block Addressing) mode A new HDD accessing method to overcome the 528 Megabyte bottleneck. The number of cylinders, heads & sectors shown in setup may not be the number physically contained in the HDD. During HDD accessing, the IDE controller will transform the logical address described by sector, head &...

  • Page 30: Hdd Low Level Format

    3-18 CHAPTER 3 Note: To support LBA or LARGE mode of HDDs, there must be some softwares involved. All these softwares are located in the Award HDD Service Routine (1NT 13h). It may be failed to access a HDD with LBA (LARGE) mode selected if you are running under a Operating System which replaces the whole 1NT 13h.

  • Page 31: Technical Information

    TECHNICAL INFORMATION 4-1 Chapter 4 Technical Information 4-1 I/O & MEMORY MAP MEMORY MAP Address Range Size Description [00000-7FFFF] 512K Conventional memory [80000-9FBFF] 127K Extended Conventional memory [9FC00-9FFFF] Extended BIOS data area if PS/2 mouse is installed [A0000-C7FFF] 160K Available for Hi DOS memory [C8000-DFFFF] Available for Hi DOS memory and adapter ROMs [E0000-EEFFF]...

  • Page 32: Time & Dma Channels Map

    4-2 CHAPTER 4 4-2 TIME & DMA CHANNELS MAP TIME MAP: TIMER Channel 0 System timer interrupt. TIMER Channel 1 DRAM REFRESH request. TIMER Channel 2 SPEAKER tone generator. DMA CHANNELS : DMA Channel 0 Available. DMA Channel 1 Onboard ECP (Option). DMA Channel 2 FLOPPY DISK (SMC CHIP).

  • Page 33: Rtc & Cmos Ram Map

    TECHNICAL INFORMATION 4-3 4-4 RTC & CMOS RAM MAP RTC & CMOS : Seconds. Second alarm. Minutes. Minutes alarm. Hours. Hours alarm. Day of week. Day of month. Month. Year. Status register A. Status register B. Status register C. Status register D. Diagnostic status byte.

  • Page 34: Appendix A: Post Codes

    4-4 CHAPTER 4 APPENDIX A: POST CODES ISA POST codes are typically output to port address 80h. POST(hex) DESCRIPTION 01-02 Reserved. Turn off OEM specific cache, shadow. 1.Initialize EISA registers (EISA BIOS only). 2.Initialize all the standard devices with default values Standard devices includes. -DMA controller (8237).
  • Page 35 TECHNICAL INFORMATION 4-5 POST(hex) DESCRIPTION Initialization of the BIOS Data Area. (40:ON - 40:FF) 1.Program some of the Chipset's value according to Setup. (Early Setup Value Program) 2.Measure CPU speed for display & decide the system clock speed. 3.Video initialization including Monochromc, CGA, EGA/VGA. If no display device found, the speaker will beep.
  • Page 36 4-6 CHAPTER 4 POST(hex) DESCRIPTION 1.Display the Award Plug & Play BIOS Extension message. (PnP BIOS only) 2.Program all onboard super I/O chips (if any) including COM ports, LPT ports, FDD port ... according to setup value. 33-3B Reserved. Set flag to allow users to enter CMOS Setup Utility. 1.Initialize Keyboard.
  • Page 37 TECHNICAL INFORMATION 4-7 POST(hex) DESCRIPTION 1.Initialize all ISA ROMs. 2.Later PCI initializations. (PCI BIOS only) -assign IRQ to PCI devices. -initialize all PCI ROMs. 3.PnP Initialzations. (PnP BIOS only) -assign IO, Memory, IRQ & DMA to PnP ISA devices. -initialize all PnP ISA ROMs. 4.Program shadows RAM according to Setup settings.

  • Page 38: Appendix B: I/O Connector

    4-8 CHAPTER 4 APPENDIX B: I/O CONNECTORS J10: PS/2 MOUSE CONNECTOR: Signal Name Data (Red Wire) Clock(Blue Wire) GND(Green Wire) VCC(Yellow Wire) J13,J14: Serial Ports Connector Signal Name Signal Name SOUT N.C. J15: Parallel Port Connector Signal Name Signal Name STROBE- AUTO FEED- Data Bit 0...
  • Page 39 TECHNICAL INFORMATION 4-9 J11: Floppy Disk Connector Signal Name Signal Name Ground FDHDIN Ground Reserved Ground FDEDIN Ground Index- Ground Motor Enable Ground Drive Select B- Ground Drive Select A- Ground Motor Enable Ground DIR- Ground STEP- Ground Write Data Ground Write Gate Ground...

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