Sony DP-IF8000 Service Manual page 8

Digital surround processor
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DP-IF8000
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2.2.2 System Control
• MICON-DSP period
Check the DSP_XCS (IC501-23pin), SCK (IC501-26pin), SDO
(IC501-24pin), and XHREQ (IC501-27pin).
The view after turning on the headphone power is shown in Fig. 29,
and the detailed timing is shown in Fig. 30.
DSP_XCS
SCK
SDO
XHREQ
DSP_XCS
SCK
(625kHz)
SDO
XHREQ
Start of 24 bit data transfer, at 2nd bit, HREQ t 1
After transfer of 24 bit data, HREQ t 0
• DIAT-MICON-DSP period
Check the DTQ (IC901-28pin), DSP_DTQ (IC501-28pin), ARDET
(IC901-27pin), DIAT_DTSEL (IC101-16pin).
Turn on the processor and set to Digital Input mode. Turn on the
headphone power, and apply an input source signal (any kind is
okay) to the processor.
TE
L 13942296513
The instant when switching from OFF to VIRTUAL FRONT using
the processor OUTPUT key is shown in Fig. 31.
The monitor view at the instant when switching from VIRTUAL
FRONT to VIRTUAL 5.1 or from VIRTUAL 5.1 to VIRTUAL 6.1
with the processor OUTPUT key is shown in Fig. 32.
The monitor view at the instant when switching from VIRTUAL
5.1 or VIRTUAL 6.1 to OFF with the processor OUTPUT key is
shown in Fig. 33.
Infrared lock (receive OK)
Infrared unlock
DTQ
(receive NG)
Report lock to DPS
DSP_DTQ
ARDET
DIAT_DTSEL
*1 Pulse output when set to DIAT receive mode.
*2 ARDET = 1 t VIRTUAL mode
ARDET = 0 t OFF mode
*3 Approximately 25 msec from lock report to DSP until DIAT
receive mode is set.
DTSEL t VIRTUAL mode
DTSEL = 0 t OFF mode
DTQ
DSP_DTQ
ARDET
DIAT_DTSEL
www
DTQ
DSP_DTQ
.
ARDET
DIAT_DTSEL
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Fig 29
Fig 30
*1
DSP identifies processor
transmit mode *2
Set DIAT receive
mode *3
Fig 31
Fig 32
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Fig 33
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