Yamaha RX-Z1 Service Manual page 37

(PLD CHECK)
fx x1 x2/2 An: Checks the operation condition of PLD
(IC20 of DSP P.C.B.). The signal passage
is the same as No.2 AP32-938 through,
although the signal output is muted.
Every time MCLK of PLD is switched, the
input fs is measured at YSS910 #1. If fs for
(1) fs x 1, (2) fs x 2, (3) fs/2, (4) analog
reproduction is correct, "OK" appears in
the corresponding place in the VFD
display and if it is not correct, "NG"
appears in that place. (It is recommended
to use 44.1kHz input.)
Depending on items, analog input or
double rate fs input cannot be measured.
In that case, "??" appears.
When an error has occurred on the DSP
circuit board, O port bit 4 of YSS938
becomes HIGH or the DC control OUT
terminal becomes LOW. (If OK, the DC
control OUT terminal becomes HIGH.)
16. SUM/VER/PORT
This menu displays the checksum, version, port setting
and REC OUT port of the main microprocessor and sub-
microprocessor. The signal is EFFECT OFF.
SUM: Displays checksums of the main microprocessor
and sub-microprocessors. They are expressed in 4
figures of hexadecimal digits with 4M bits of the
code of the entire program added for each octet.
Checksum of main microprocessor
(4 figures of alphabets and numbers)
fs x1 x2 /2 An
44 OK OK OK OK
16.SUM/VER/PORT
SUM:2080/B501
Checksum of sub-microprocessor
(4 figures of alphabets and numbers)
RX-Z1/DSP-AZ1
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