Spectra MB720 User Manual page 41

DRAM Clock / Drive Control
This field provides settings related to DRAM. The fields are listed
below.
Current FSB Frequency
The default setting of the FSB Frequency is 100MHz.
Current DRAM Frequency
The default setting of the DRAM Frequency is 133MHz.
DRAM Clock
The default setting of the DRAM clock is SPD.
DRAM Timing
This option refers to the method by which the DRAM timing is selected.
The default is By SPD.
DRAM CAS Latency
This is the period between when the chipset requests data from memory
and when the memory is ready to send the data across the bus.
Bank Interleave
This decides how multiple memory modules communicate. It will only
make a difference if you have more than one memory module.
Precharge to Active(Trp)
Theamount of time from a bank precharge request to when it can be
activated.
Active to Precharge(Tras)
The Active to Precharge timing controls the length of the delay between
the activation and precharge commands – the length of time after
activation can the access cycle be started again.
Active to CMD(Trcd)
This is the time between a row access request and a column access
request.
REF to ACT/REF to REF(Trfc)
The default setting is 15T.
ACT(0) to ACT(1) (TRRD)
The default time setting is 3T..
DRAM Command Rate
The time to wait after a chip select before activate and read can be started.
AGP & P2P Bridge Control
The fields related to AGP & P2P Bridge Control are listed below.
AGP Aperture Size
The field sets aperture size of the graphics. The aperture is a portion of the
PCI memory address range dedicated for graphics memory address space.
Host cycles that hit the aperture range are forwarded to the AGP without
any translation. The default setting is 64M.
AGP3.0 Mode
The default setting is 8X.
MB720 User's Manual
BIOS SETUP
37