JVC KD-SX980 Service Manual page 36

Cd receiver
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KD-SX980
QQ
3 7 63 1515 0
HD74HC126FP-X (IC801) : Buffer
1.Terminal layout
1C
1
2
1A
3
1Y
2C
4
2A
5
6
2Y
7
GND
2.Block diagram
Vcc
Input
TE
L 13942296513
IC-PST600M/G/-W (IC702) : System reset
Co1
www
1-36
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14
VU
13
4C
12
4A
11
4Y
10
3C
9
3A
8
3Y
Vcc
1A
1Y
2A
3A
2Y
4A
1C
2C
3C
2Y
4C
3Y
4Y
Note) CL includes probe and jig capacitance
OP1
x
ao
y
.
i
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8
3.Pin function
Input
Output
C
A
Y
L
X
Z
H
L
H
H
H
L
Note) H:High level
L:Low level
X:Irrelevant
Z:Off(High-impedance)
State a 3-state input
1k
Output
CL
Output
Q Q
Sample as Load Circuit 1
3
6 7
1 3
Output
Sample as Load Circuit 1
Output
Sample as Load Circuit 1
1
IN
3
Vout
2
OUT
u163
.
2 9
9 4
2 8
S1
1k
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9

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