JVC KD-SX980 Service Manual page 25

QQ
3 7 63 1515 0
3.Pin function
Pin No. Symbol
1
VIN1-A
2
VIN1+A
3
VCCP1
4
VO1+
5
VO1-
6
VO2+
7
VO2-
8
VO3+
9
VO3-
10
VO4+
11
VO4-
12
VCCP2
13
VIN4
14
VIN4G
15
VIN3
16
VIN3G
17
VIN2
18
VIN2G
19
REGIN
20
3.3VREG
21
VCCS
22
VREFIN
23
MUTE
TE
L 13942296513
24
VIN1_SW
25
S_GND
26
VIN1+B
27
VIN1-B
28
VIN1
W24L010AJ-AS-X (IC653) : SRAM
1.Pin layout
NC 1 32 VDD
A16 2 31 A15
A14 3 30 CS2
A12 4 29 WE
A7 5 28 A13
A6 6 27 A8
A5 7 26 A9
A4 8 25 A11
A3 9 24 OE
A2 10 23 A10
A1 11 22 CS1
A0 12 21 I/O8
www
I/O1 13 20 I/O7
I/O2 14 19 I/O6
I/O3 15 18 I/O5
Vss 16 17 I/O4
.
http://www.xiaoyu163.com
CH1 input AMP_inverted input
CH1 input AMP_non-inverted input
CH1 and CH2 power stage power supply
Output pin(+)for channel 1
CH1 output pin (-) for channel 1
Output pin(+)for channel 2
Output pin(-)for channel 2
Output pin(+)for channel 3
Output pin(-)for channel 3
Output pin(+)for channel 4
Output pin(-)for channel 4
CH3 and CH4 power stage powr supply
Input pin for channel 4
Input pin for channel 4(for gain adjustment)
Input pin for channel 3
Input pin for channel 3(for gain adjustment)
Input pin for channel 2
Input pin for channel 2(for gain adjustment)
External PNP transistor, base connection
3.3VREG output pin, external PNP transistor,collector connection
Signal system GND
Reference voltage application pin
Output ON/OFF pin
CH1 input OP AMP_changeover pin
Signal system GND
CH1 AMP_B non-inverted input pin
CH1 AMP_B inverted input pin
CH1 input pin, input OP_AMP output pin
2.Block diagram
VDD
VSS
A0
DECODER
A16
CS2
CS1
CONTROL
OE
WE
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
Function
Q Q
3 6 7 1 3 1 5
3.Pin functions
Symbol
A0-A16
I/O1-I/O8
CS1,CS2
CORE
ARRAY
VDD
I/O1
DATA I/O
I/O8
co
.
9 4 2 8
0 5 8 2 9 9 4
Function
Address inputs
Data inpts/outputs
Chip select input
WE Write enable input
OE Output enable input
Power supply
VSS Ground
NC No connection
m
KD-SX980
9 9
2 8 9 9
1-25