Table of Contents
Advertisement
15 Block Diagram
AN8882SB-E1
IC1
SERVO AMP
OPTICAL PICK-UP
SEMICONDUCTOR
LASER
1
PD
Q1
Vref.
LASER
2
LD
POWER
Vref.
DRIVE
+B1
Vref.
34
B
+B1
Vref.
5
LDON
PHOTO DETECTOR
Vref.
E
E
36
A
Vref.
D
C
31
E
A
B
D
C
E
Vref.
Vref.
F
F
28
F
F
Vref.
C0GBF0000007
IC5
FOCUS COIL / TRACKING
COIL / TRAVERSE MOTOR DRIVE
F+
16
VO3-
VIN2
FOCUS
COIL
F-
15
VG2
VO3+
T+
14
VIN3
VO2-
TRACKING
COIL
VG3
T-
13
VO2+
VIN1
10
VO1+
VG1
M
TRAVERSE
MOTOR
VIN4
11
VO1-
VREF1
8,6
Vcc
V
SS
1
,
2
26
ECR
V
DD
GSW
2,4,7
EC
A1~3
9
H1+
PS
10
H1-
RNF
11
M
H2+
SPINDLE
VM
12
MOTOR
H2-
13
Vcc
H3+
14
H3-
FG2
15
VH
8
CNF
GND
+B1
9
3
CAGC
V
CC
1
OFTR
DET.
RF
AGC
EQ
ARF
10
BDO
DET.
RF
/RFDET
17
DET.
BDO
14
16
OFTR
A
Ach
SUBTRACTER
FE OUT
27
Vref.
VCBA
V
2
21
CC
B
Bch
VREF2
22
Vref.
Vref.
GND
18
Ech
SUBTRACTER
TEOUT
24
VCBA
Vref.
28
Fch
GCTRL
30
29
7
4
12
Q2
SWITCH-
ING
1
28
27
26
3
2
25
21
22
+7V
21
22
23
28
C0GBF0000004
+7V
IC4
27
+7V
SPINDLE MOTOR
DRIVE
25
V
DD
19
17
+B1
+B1
+B1
47
46
72
70
48
4
50
60
PHASE
FREQUENCY
COMPA-
44
ARF
DSL
COMPARATOR
RATOR
VCO
EFM DATA
DE-
SYNCHRONIZING
MODULATOR
PROTECTION
OFTR
FE
69
FLAG 6
FLAG6
39
BDO
SYNCHRO-
+B1
38
NIZING
/RFDET
SERVO
ITERPOLATION
INPUT
PROTECTION
PORT
SRAM
VREF
RFENV
34
RFENV
RAM
DETECTOR/
FE
32
ADDRESS
FE
AUTO CUE
GENERATOR
33
TE
OFTR
36
OFTR
CLV
SERVO
SUB-CODE
37
DEMODU-
TRCRS
35
VDET
SERVO
CPU
Q3
TBAL
31
TBAL
CRCC CHECK
SWITCH-
ING
FBAL
30
FBAL
LDON
40
LDON
REGISTER
42
TOFS
VREF
29
VREF
D/A
SERVO OUTPUT
CONVERTER
PORT
41
PLLF2
TRD
FOD
23
27
28
22
26
10
21
24
25
11
TVD
AN77L05M-E1
ECS
IC2
ECM
+B1
REGULATOR
+7V
PC
FG
69
SL-DZ1200PP / SL-DZ1200EB / SL-DZ1200EG / SL-DZ1200EP / SL-DZ1200GN
MN6627482WA
IC3
SERVO PROCESSOR / DIGITAL SIGNAL PROCESSOR
DIGITAL FILTER , D/A CONVERTER
5
74
51
57
SYNDROME
DIGITAL AUDIO
CALCULATION
INTERFACE
CIRC
DECODER
INTERPOLATION
/SOFT MUTING
/DIGITAL
ATTENUATION/
PEAK DETECT/
AUTO CUE
S/P
CONVERTER
16K
PEAK
LATOR
Q-CODE
MICROCOMPUTER
TIMING GEN.
INTERFACE
/PITCH CONT.
12
43
16
13
14
15
18
45
17
8
7
9
20
19
58
59
Q5
SWITCH-
ING
Q4
+B1
SWITCH-
ING
+B1
SL-DZ1200(PP,EB,EG,EP,GN) BLOCK DIAGRAM
TX
6
OUTL
73
OUTR
75
IPFLAG
64
IPFLAG
LRCK
2
LRCK
BCLK
1
BCLK
SRDATA
3
SRDATA
SUBC
55
SUBC
SBCK
56
SBCK
CLDCK
62
/CLDCK
PSEL
78
SSEL
80
+B1
MSEL
79
FCLK
63
EFM
52
X1
(16.9344MHz)
4X
2X
Advertisement
Table of Contents
