Vga/Ypbpr Analog Signal Disposal; Analog Video Signal Disposal; Dvi Digital Signal Disposal - Changhong Electric PT4206 Service Manual

3.1.1 .4

VGA/YpbPr analog signal disposal

R, G, B signal From the VGA 1, 2, 3 pin through the static electricity protection
circuit switches with
signal(PC source) pass C81 C82 C84 to 54 48 43 pin of MST9885 and A/D converter in it
Moreover ,
Vertical , Horizontal
synchronous pulse orthopedics circuit after static electricity protect processing.
sync after face lifting in 74LCX32 sends to the PI5V330 to the switch , and
Horizontal
then feedback to the 30 pins of MST9885, By the effect of
MST9885 creates PLL lock providing the MST9885 work clock.
buffer and enlarge in U71 outputs from the 6 pin of U71, and choices in U9(74
LVC126s).In VGA mode ,the signal to the 31 pin of MST9885, provides a
sync to the MST9885.
The PDP display is the exterior equipments, and need an identify signal to
examined by host when host communication. The 24LC21s of U8( EEPROM) saves
the hardware concerning display parameter.( install etc. such as the factory, model
number, resolution)
MST9885 under the control of PW113 bus, converts the R,G,B input 8 bit digital R,G,B signal.
67 pin outputs pixel clock signal DATACK
PW1235s at the same time, disposals the format judged by PW113.
3.1.1.4

Analog video signal disposal

9 pin of N901 outputs video signal passes VN901 and goes to 1 pin of TEA6425D at the
same time 1 channel AV video signal sends to the 8 pin of TEA6425D and other channel S-video
signal (Y C signal) sends to 6 5 pin of TEA6425D respectively. The three signals switches in
the TEA6425D. VIDEO or Y signal outputs toVPC3230D from 17pin C signal outputs from
18pin at the same time 19 pin video outputs from19 pin VPC3230 The signal from TEA6425
after switch and A/D send to chroma decode circuit ,which can identify PAL/NTSC/SECAM
signal automatically
system switches the TEA6425D channel
TEA6425D. After digital 3D comb filter in uPD64083
VPC3230D to AD convertor and saturation control etc. The output digital YUV signal switches
with digital YUV signal after A/D which inputs from 4 5 6pin and outputs digital YUV signal
sends to video disposal include zoom contrast panorama mode brightness gain control tc. After
then the signal transforms to from 31 40pin digital YUV signal 4:2:2 (ITU-R656 format )and
sends to PW1235 to DEINTERLACE etc

3.1.1 .5 DVI digital signal disposal

We use DVI-D interface
DVI digital signal 4channels DS signal from DVI jack each send to 90 91 85 86 80
81 93 94pin of SiI161B. By the control of 100 3pin (input bus) after in SiI161B(VCR data
resume sync. Head test
digital R G B signal which has two mode one mode when 4 pin of SiI161B is low
output 24bit even pixel when 4pin is high
4pin to ground so each signal from 10 17 20 27 30 37pin outputs R,G,B even pixel data
switch with 24bit VGA digital signal disposalled by MST9885 and send to PW113 to transform
video signal from YpbPr input port in PI5V330. After then R G B
sync from the VGA 13,14 pin also send to the
The above signal sends to the PW113 and
and to each decode after identify. Such as NTSC video after identify
enlarge circuit decode circuit and logic interface circuit) it outputs
sends to NTSC 3D comb filter from 14 pin of
YC signal sends back to 73 71pin of
it output 48biteven and odd pixel data we connect
23
sync ,
Horizontal
sync after
Vertical
Vertical
the
it