Cpu Subsystem - IBM F16 User Manual

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ASICs, the Serializer/Deserializer (SERDES), and the SFP media are the key
components that provide high-speed data transfer. SFP media interfaces support
SWL and LWL.
The system chassis is a 1U height enclosure with space for two power supply units
and one system board. The system board is placed in an Electromagnetic
Interference (EMI) enclosure tray as an EMI-proof system unit. Two 126-watt
removable, redundant power supplies provide hot-swappable capability. Cooling
fans are mounted in the rear to provide airflow for system cooling.

CPU subsystem

An Intel 80960VH CPU is used for switch initialization and management functions.
The CPU runs the Fabric OS and is responsible for switch initialization,
configuration, and management. IBM-designed ASICs provide the switching
functionality.
The following peripherals are also supported:
v An Ethernet port
v A serial port
v Three digital thermometers
v A real-time clock
v Two power supply controls
v General input/output (I/O)
The CPU subsystem is a mixed voltage system using 1.8 V, 2.5 V, 3.3 V, and 5 V,
depending on the device. The maximum board power consumption is 78 W.
Features
The 2109 Model F16 CPU subsystem includes the following features:
v A 80960VH-100 MHz CPU
v An SDRAM controller with parity check at 33 MHz
v A peripheral control interconnect (PCI) bus arbiter
v An on-board SDRAM with data parity to support a 16 MB configuration
v One PLCC32 Boot Flash socket to support up to 512 KB of Flash memory
v 8 MB (2 x 4 MB) Flash memory for software storage
v 10BASE-T or 100BASE-T port for management connection with RJ45 connector
v One RS232 port with DB9 connector
v 16 light emitting diodes (LEDs) to indicate the status for each port
v 16 LEDs to indicate the link speed for each port
v One LED (green) to indicate the system power-on status
v Three digital thermometers for temperature sensing
v Two analog switches to control the power supply inter-integrated circuit (I2C) bus
access
v One 3.3 V to 1.8 V dc/dc converter for Bloom ASIC core supply
v Two Bloom ASICs supporting up to 16 nonblocking ports
v 16 SERDES
v One real-time clock with a battery and 56 bytes of nonvolatile RAM (NVRAM)
3
Chapter 1. Introduction

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